diff options
| author | Frank Wu <frank_wu@compal.corp-partner.google.com> | 2021-08-03 17:30:27 +0800 |
|---|---|---|
| committer | Karthik Ramasubramanian <kramasub@google.com> | 2021-08-16 14:59:01 +0000 |
| commit | ae02727c322e162fc690ce5c13fe39cac5c30856 (patch) | |
| tree | 398a64a4d7a53a07237f46001035428d5a7e76b9 /src/mainboard/google/dedede/variants/driblee/overridetree.cb | |
| parent | c822b9519ec1a8a378af39e713754c8ff8a1ff83 (diff) | |
mb/google/dedede: Create driblee variant
Create the driblee variant of the waddledee reference board by
copying the template files to a new directory named for the variant.
(Auto-generated by create_coreboot_variant.sh version 4.5.0.)
BUG=b:191732473
BRANCH=None
TEST=util/abuild/abuild -p none -t google/dedede -x -a
make sure the build includes GOOGLE_DRIBLEE
Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: I1ad9a4e0cf7999337b55d62d5cc94e4f6c2e98f3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56798
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google/dedede/variants/driblee/overridetree.cb')
| -rw-r--r-- | src/mainboard/google/dedede/variants/driblee/overridetree.cb | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/driblee/overridetree.cb b/src/mainboard/google/dedede/variants/driblee/overridetree.cb new file mode 100644 index 0000000000..cbad0d29a0 --- /dev/null +++ b/src/mainboard/google/dedede/variants/driblee/overridetree.cb @@ -0,0 +1,43 @@ +chip soc/intel/jasperlake + + # Intel Common SoC Config + #+-------------------+---------------------------+ + #| Field | Value | + #+-------------------+---------------------------+ + #| I2C0 | Trackpad | + #| I2C1 | Digitizer | + #| I2C2 | Touchscreen | + #| I2C3 | Camera | + #| I2C4 | Audio | + #+-------------------+---------------------------+ + register "common_soc_config" = "{ + .i2c[0] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[1] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[2] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[3] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[4] = { + .speed = I2C_SPEED_FAST, + }, + }" + + register "SerialIoGSpiMode[PchSerialIoIndexGSPI0]" = "PchSerialIoDisabled" # Disable GSPI0 + register "SerialIoGSpiCsMode[PchSerialIoIndexGSPI0]" = "0" + + device domain 0 on + device pci 15.0 on end + device pci 1e.2 off end # GSPI 0 + device pci 1f.0 on + chip drivers/pc80/tpm + device pnp 0c31.0 on end # Discrete TPM + end # chip drivers/pc80/tpm + end # PCH eSPI + end +end |