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author | Maulik V Vaghela <maulik.v.vaghela@intel.com> | 2020-12-18 14:08:00 +0530 |
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committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-21 02:32:05 +0000 |
commit | c5603145d30f954f3c0fe69b7ab2ea7ffccf0a71 (patch) | |
tree | 2ba06a27578f054823e966e9a10e22e6249744fa /src/mainboard/google/dedede/variants/drawcia | |
parent | bc89e8337cb3d4794d4a375ab2bd1445b5830a6a (diff) |
Revert "mb/google/dedede: Update Imon slope and Offset Value for Drawcia"
Falling back to default values for Imon slope and offset for Drawcia
This is as per recommendation from ODM based on calibration
This reverts commit 2ac88f2347352c5dff0af18d5130dbdd6f032930.
BUG=b:175629526
BRANCH=dedede
TEST=Debug FSP confirms that values are reverted to default
Change-Id: I605acdcd0de2c5dfc28af2aea8cefc6b629c0925
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48737
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Vidya Gopalakrishnan <vidya.gopalakrishnan@intel.corp-partner.google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/dedede/variants/drawcia')
-rw-r--r-- | src/mainboard/google/dedede/variants/drawcia/overridetree.cb | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb index 493854c34d..e09dbe8bf7 100644 --- a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb +++ b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb @@ -63,8 +63,6 @@ chip soc/intel/jasperlake }" register "tcc_offset" = "20" # TCC of 85C - register "ImonOffset" = "1400" # Imon Offset = 1.4 - register "ImonSlope" = "100" # Imon Slope = 1.0 # Enable Acoustic noise mitigation and set slew rate to 1/4 # Rest of the parameters are 0 by default. |