diff options
| author | Sam McNally <sammc@chromium.org> | 2023-02-20 14:05:54 +1100 |
|---|---|---|
| committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2023-02-22 00:57:23 +0000 |
| commit | 8b4154c1d2914c67d76cd9467457ea3d2815f47a (patch) | |
| tree | 3355017ff021d0d5607a6050daa74e8e12f6e8ff /src/mainboard/google/dedede/variants/dibbi | |
| parent | 2e6fa8206e0a3bdd2e53542b6377fe2b37e3f26e (diff) | |
mb/google/dedede/var/dibbi: Enable USB2 port 6
USB2 port 6 may be used for a PL2303 USB to UART bridge, so enable the
port.
BUG=b:269690930
TEST=kernel can detect a PL2303 USB device
BRANCH=dedede
Change-Id: I0ba421c3a502e69d101de40bbd31122211d3fb05
Signed-off-by: Sam McNally <sammc@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73125
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/dedede/variants/dibbi')
| -rw-r--r-- | src/mainboard/google/dedede/variants/dibbi/overridetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/dibbi/overridetree.cb b/src/mainboard/google/dedede/variants/dibbi/overridetree.cb index 1c463b9a21..69307a3946 100644 --- a/src/mainboard/google/dedede/variants/dibbi/overridetree.cb +++ b/src/mainboard/google/dedede/variants/dibbi/overridetree.cb @@ -53,6 +53,7 @@ chip soc/intel/jasperlake register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A1 register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A2 register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A3 + register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # PL2303 register "usb3_ports[1]" = "USB3_PORT_EMPTY" # No USB3/2 Type-C Port C1 register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/1 Type-A Port A2 |