diff options
| author | Teddy Shih <teddyshih@ami.corp-partner.google.com> | 2022-03-10 16:17:26 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-14 15:47:50 +0000 |
| commit | ca9658bdb2f4097ca9c5d4f20a131caa0b09100f (patch) | |
| tree | fe51a46811298c58ad7314b57af5d7e74ab438a9 /src/mainboard/google/dedede/variants/beadrix | |
| parent | ae7ec18d3d1a5a3e60a79b10a931f554dc210430 (diff) | |
mb/google/dedede: Update DPTF setting
Update PL1, PL2, and temperature sensor values from thermal team,
as well as, we remove unused temperature sensors according to
baseboard/devicetree.cb and mainboard schematic. After we check
DTT setting, the thermal and performance test pass.
BRANCH=dedede
BUG=b:204229229
TEST=on beadrix, run following commands:
localhost /tmp # cat /sys/class/thermal/thermal_zone*/type
x86_pkg_temp
INT3400 Thermal
TSR0
TSR1
TCPU
localhost /tmp # cat /sys/class/thermal/thermal_zone*/temp
45000
20000
32800
32800
39000
Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com>
Change-Id: Ibc59c4aa431f600158e744f5bbdc6d59a07a1ef3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62729
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Super Ni <super.ni@intel.corp-partner.google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/dedede/variants/beadrix')
| -rw-r--r-- | src/mainboard/google/dedede/variants/beadrix/overridetree.cb | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb index 9c6d931f22..7f2d62fa42 100644 --- a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb +++ b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb @@ -40,6 +40,46 @@ chip soc/intel/jasperlake }" device domain 0 on + device pci 04.0 on + # Default DPTF Policy for all Dedede boards if not overridden + chip drivers/intel/dptf + register "options.tsr[0].desc" = ""Memory"" + register "options.tsr[1].desc" = ""CPU"" + register "policies.passive" = "{ + [0] = DPTF_PASSIVE(CPU, CPU, 80, 4000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 110, 6000), + [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 110, 4000), + }" + register "policies.critical" = "{ + [0] = DPTF_CRITICAL(CPU, 110, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 110, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 110, SHUTDOWN), + }" + register "controls.power_limits" = "{ + .pl1 = { + .min_power = 4000, + .max_power = 6000, + .time_window_min = 1 * MSECS_PER_SEC, + .time_window_max = 1 * MSECS_PER_SEC, + .granularity = 250, + }, + .pl2 = { + .min_power = 20000, + .max_power = 20000, + .time_window_min = 1 * MSECS_PER_SEC, + .time_window_max = 1 * MSECS_PER_SEC, + .granularity = 1000, + } + }" + register "controls.charger_perf" = "{ + [0] = { 55, 3500 }, + [1] = { 47, 3000 }, + [2] = { 39, 2500 }, + [3] = { 31, 2000 }, + }" + device generic 0 on end + end + end device pci 05.0 off end # IPU - MIPI Camera device pci 14.0 on chip drivers/usb/acpi |