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authorTony Huang <tony-huang@quanta.corp-partner.google.com>2021-05-19 16:59:17 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-07-01 09:41:04 +0000
commit856b579fe55696147ab3361e51a042efc4302518 (patch)
treed4564b3e6fd8cdd7c5e603ee98ec6eedb694203b /src/mainboard/google/dedede/variants/baseboard
parentceca5dedbc13ddc31df69c0c9d9664c5c2347f19 (diff)
mb/google/dedede/var/kracko: Update LTE USB port configuration
Update LTE USB port configuration at run-time after probing FW_CONFIG. By default the concerned USB port takes the Type-A port configuration. BUG=b:178092096 BRANCH=dedede TEST=Build and boot to OS to check LTE by modem status Change-Id: If12cc29ddda6d5c32c0bda840a3680e7bf932f89 Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54671 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/dedede/variants/baseboard')
-rw-r--r--src/mainboard/google/dedede/variants/baseboard/Makefile.inc1
-rw-r--r--src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h3
-rw-r--r--src/mainboard/google/dedede/variants/baseboard/ramstage.c48
3 files changed, 52 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/Makefile.inc b/src/mainboard/google/dedede/variants/baseboard/Makefile.inc
index 4f87de9c41..a79e163b38 100644
--- a/src/mainboard/google/dedede/variants/baseboard/Makefile.inc
+++ b/src/mainboard/google/dedede/variants/baseboard/Makefile.inc
@@ -3,5 +3,6 @@ bootblock-y += gpio.c
romstage-y += memory.c
ramstage-y += gpio.c
+ramstage-y += ramstage.c
smm-y += gpio.c
diff --git a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h
index a3dcd919d1..78e44b4ae0 100644
--- a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h
@@ -5,6 +5,7 @@
#include <soc/gpio.h>
#include <stdint.h>
+#include <acpi/acpi_device.h>
/* The next set of functions return the gpio table and fill in the number of
* entries for each table. */
@@ -42,4 +43,6 @@ void variant_smi_sleep(u8 slp_typ);
/* Modify devictree settings during ramstage. */
void variant_devtree_update(void);
+/* Modify LTE devictree settings during ramstage. */
+void update_lte_device(struct acpi_gpio *lte_reset_gpio, struct acpi_gpio *lte_enable_gpio);
#endif /*__BASEBOARD_VARIANTS_H__ */
diff --git a/src/mainboard/google/dedede/variants/baseboard/ramstage.c b/src/mainboard/google/dedede/variants/baseboard/ramstage.c
new file mode 100644
index 0000000000..136fe1354f
--- /dev/null
+++ b/src/mainboard/google/dedede/variants/baseboard/ramstage.c
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <acpi/acpi_device.h>
+#include <baseboard/variants.h>
+#include <console/console.h>
+#include <drivers/usb/acpi/chip.h>
+#include <fw_config.h>
+#include <gpio.h>
+#include <soc/pci_devs.h>
+
+#define LTE_USB_PORT_ID 3
+#define LTE_USB_PORT_TYPE 2
+
+void update_lte_device(struct acpi_gpio *lte_reset_gpio, struct acpi_gpio *lte_enable_gpio)
+{
+ struct device *xhci, *hub = NULL, *port = NULL;
+ struct drivers_usb_acpi_config *config;
+
+ xhci = pcidev_path_on_root(PCH_DEVFN_XHCI);
+ if (!xhci) {
+ printk(BIOS_ERR, "%s: Could not locate XHCI device in DT\n", __func__);
+ return;
+ }
+
+ while ((hub = dev_bus_each_child(xhci->link_list, hub)) != NULL) {
+ while ((port = dev_bus_each_child(hub->link_list, port)) != NULL) {
+ if (!port->chip_info || port->path.usb.port_id != LTE_USB_PORT_ID)
+ continue;
+
+ if (fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_LTE_HDMI)) ||
+ fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_1C_LTE)) ||
+ fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_1A_HDMI_LTE))) {
+
+ config = port->chip_info;
+ config->type = UPC_TYPE_INTERNAL;
+ if (port->path.usb.port_type == LTE_USB_PORT_TYPE) {
+ config->has_power_resource = 1;
+ memcpy(&config->reset_gpio, &lte_reset_gpio,
+ sizeof(config->reset_gpio));
+ config->reset_off_delay_ms = 20;
+ memcpy(&config->enable_gpio, &lte_enable_gpio,
+ sizeof(config->enable_gpio));
+ config->enable_delay_ms = 20;
+ }
+ }
+ }
+ }
+}