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authorMichael Niewöhner <foss@mniewoehner.de>2020-09-05 13:47:11 +0200
committerMichael Niewöhner <c0d3z3r0@review.coreboot.org>2020-09-06 14:38:28 +0000
commit2539a672731e0f8059ce76a11a350a3a0c5ccddf (patch)
treedb2463ae12d30e05893b2a443a6acce0d5228e44 /src/mainboard/google/dedede/variants/baseboard
parent056d5523578dea5968d14ad1277ea263a5be7796 (diff)
mb/*: devicetree: drop now unneeded USBx_PORT_EMPTY
Setting USBx_PORT_EMPTY is not a requirement anymore, since unset devicetree settings default to 0 and the OC pin now only gets set when the USB port is enabled (see CB:45112). Thus, drop the setting from all devicetrees. Change-Id: I899349c49fa7de1c1acdca24994ebe65c01d80c6 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45125 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'src/mainboard/google/dedede/variants/baseboard')
-rw-r--r--src/mainboard/google/dedede/variants/baseboard/devicetree.cb4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
index 13666ad3e9..363307b0db 100644
--- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
@@ -32,16 +32,12 @@ chip soc/intel/jasperlake
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A0
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A1
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Discrete Bluetooth
- register "usb2_ports[5]" = "USB2_PORT_EMPTY" # Not Used
- register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Not Used
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Integrated Bluetooth
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type-C Port C0
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type-C Port C1
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/1 Type-A Port A0
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/1 Type-A Port A1
- register "usb3_ports[4]" = "USB3_PORT_EMPTY" # Not Used
- register "usb3_ports[5]" = "USB3_PORT_EMPTY" # Not Used
register "SerialIoI2cMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,