diff options
author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2020-05-15 11:04:39 -0600 |
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committer | Furquan Shaikh <furquan@google.com> | 2020-05-28 03:12:12 +0000 |
commit | e3f564988b7d893bfe681f3f93bb2a89d36f9b01 (patch) | |
tree | eadf043a7f7df7ace25cf296642d4820237c66d9 /src/mainboard/google/dedede/mainboard.c | |
parent | b3c41329fdca84a251c183bbc2b0767978e9d96f (diff) |
mb/google/dedede: Enable Intel Speed Shift Technology
Enable Intel Speed Shift Technology (ISST) by default. Disable ISST in
waddledee and waddledoo variants on early phases.
BUG=b:151281860
TEST=Build and boot the mainboard. Ensure that cpufreq driver to
configure P-states is enabled in kernel on boards where board version is
provisioned.
Change-Id: Id65d7981501c2f282e564bfc140f8d499d5713e8
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39477
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src/mainboard/google/dedede/mainboard.c')
-rw-r--r-- | src/mainboard/google/dedede/mainboard.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/mainboard.c b/src/mainboard/google/dedede/mainboard.c index c503a86a6e..fe89527e5a 100644 --- a/src/mainboard/google/dedede/mainboard.c +++ b/src/mainboard/google/dedede/mainboard.c @@ -1,11 +1,25 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include <acpi/acpi.h> +#include <bootstate.h> #include <baseboard/variants.h> #include <device/device.h> #include <ec/ec.h> #include <vendorcode/google/chromeos/chromeos.h> +__weak void variant_isst_override(void) +{ + /* + * Implement the override only if the board uses very early/initial revisions of + * Silicon. Otherwise nothing to override. + */ +} + +static void mainboard_config_isst(void *unused) +{ + variant_isst_override(); +} + static void mainboard_init(void *chip_info) { const struct pad_config *pads; @@ -37,3 +51,6 @@ struct chip_operations mainboard_ops = { .init = mainboard_init, .enable_dev = mainboard_enable, }; + +/* Configure ISST before CPU initialization */ +BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, mainboard_config_isst, NULL); |