diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2020-01-07 16:21:10 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-01-27 04:48:12 +0000 |
| commit | 501e3c1837ba527ba8e49753688ca73af022df51 (patch) | |
| tree | e0014e9919aebb33f8b5f635142274ec36b6e89c /src/mainboard/google/dedede/dsdt.asl | |
| parent | b7b11475c16b658698d1adcc9dbc0d969eddb9bd (diff) | |
mb/google/dedede: Enable EC
Perform EC initialization in bootblock and ramstages. Add associated ACPI
configuration.
BUG=b:144768001
TEST=Build Test.
Change-Id: Ib31ae190818c8870bdd46ea6c3d9ca70dc0485cc
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38282
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/dedede/dsdt.asl')
| -rw-r--r-- | src/mainboard/google/dedede/dsdt.asl | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/dsdt.asl b/src/mainboard/google/dedede/dsdt.asl index 3e278e3e9d..3d17017101 100644 --- a/src/mainboard/google/dedede/dsdt.asl +++ b/src/mainboard/google/dedede/dsdt.asl @@ -7,6 +7,7 @@ */ #include <arch/acpi.h> +#include <variant/ec.h> #include <variant/gpio.h> DefinitionBlock( @@ -41,4 +42,12 @@ DefinitionBlock( /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> + /* Chrome OS Embedded Controller */ + Scope (\_SB.PCI0.LPCB) + { + /* ACPI code for EC SuperIO functions */ + #include <ec/google/chromeec/acpi/superio.asl> + /* ACPI code for EC functions */ + #include <ec/google/chromeec/acpi/ec.asl> + } } |