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authorAaron Durbin <adurbin@chromium.org>2021-03-31 14:35:26 -0600
committerAaron Durbin <adurbin@chromium.org>2021-04-05 14:31:08 +0000
commit7164ad74bf1f2006b85670e9e74aefdf643173a8 (patch)
tree42a47da3020cde9152b2605bec822f046592b878 /src/mainboard/google/dedede/Kconfig
parentf7f715dff38c4a629139b2493ed6e0d7cc2eb36f (diff)
mb/google/dedede: add discrete TPM 2.0 configuration
There are forthcoming designs that will be utilizing a discrete TPM 2.0 solution. Split the existing dedede configuration options so future mainboard variants can easily select the appropriate Kconfig option using the newly introduced options: - BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50 - BOARD_GOOGLE_BASEBOARD_DEDEDE_TPM2 The existing variants all select the former option, BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50 since all those designs currently utilize Cr50. BUG=b:184151664 Change-Id: I2bdb1ca4fd78cc0628256d49678ea042c55f6fba Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52030 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aseda Aboagye <aaboagye@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/dedede/Kconfig')
-rw-r--r--src/mainboard/google/dedede/Kconfig41
1 files changed, 31 insertions, 10 deletions
diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig
index 9f19dea484..66541b66bc 100644
--- a/src/mainboard/google/dedede/Kconfig
+++ b/src/mainboard/google/dedede/Kconfig
@@ -1,7 +1,6 @@
config BOARD_GOOGLE_BASEBOARD_DEDEDE
def_bool n
select BOARD_ROMSIZE_KB_16384 if !BOARD_ROMSIZE_KB_32768
- select CR50_USE_LONG_INTERRUPT_PULSES
select DPTF_USE_EISA_HID
select DRIVERS_GENERIC_GPIO_KEYS
select DRIVERS_I2C_GENERIC
@@ -22,7 +21,6 @@ config BOARD_GOOGLE_BASEBOARD_DEDEDE
select HAVE_ACPI_TABLES
select INTEL_LPSS_UART_FOR_CONSOLE
select MAINBOARD_HAS_CHROMEOS
- select MAINBOARD_HAS_SPI_TPM_CR50
select MAINBOARD_HAS_TPM2
select SOC_INTEL_JASPERLAKE
select SOC_INTEL_COMMON_BLOCK_DTT
@@ -32,6 +30,17 @@ config BOARD_GOOGLE_BASEBOARD_DEDEDE
select SOC_INTEL_COMMON_BLOCK_IPU
select DRIVERS_GENERIC_ALC1015
+config BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50
+ def_bool n
+ select CR50_USE_LONG_INTERRUPT_PULSES
+ select MAINBOARD_HAS_SPI_TPM_CR50
+ select BOARD_GOOGLE_BASEBOARD_DEDEDE
+
+config BOARD_GOOGLE_BASEBOARD_DEDEDE_TPM2
+ def_bool n
+ select MAINBOARD_HAS_LPC_TPM
+ select BOARD_GOOGLE_BASEBOARD_DEDEDE
+
if BOARD_GOOGLE_BASEBOARD_DEDEDE
config BASEBOARD_DEDEDE_LAPTOP
@@ -39,7 +48,7 @@ config BASEBOARD_DEDEDE_LAPTOP
select SYSTEM_TYPE_LAPTOP
config CHROMEOS
- select CHROMEOS_CSE_BOARD_RESET_OVERRIDE
+ select CHROMEOS_CSE_BOARD_RESET_OVERRIDE if BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50
select CHROMEOS_DRAM_PART_NUMBER_IN_CBI
select EC_GOOGLE_CHROMEEC_SWITCHES
select GBB_FLAG_FORCE_DEV_SWITCH_ON
@@ -65,9 +74,6 @@ config DIMM_SPD_SIZE
int
default 512
-config DRIVER_TPM_SPI_BUS
- default 0x1
-
config FMDFILE
string
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos-dedede-16MiB.fmd" if BOARD_ROMSIZE_KB_16384
@@ -111,10 +117,6 @@ config OVERRIDE_DEVICETREE
string
default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" if !BOARD_GOOGLE_DEDEDE
-config TPM_TIS_ACPI_INTERRUPT
- int
- default 4 # GPE0_DW0_4 (GPP_B4)
-
config UART_FOR_CONSOLE
int
default 2
@@ -142,3 +144,22 @@ config VARIANT_DIR
default "cret" if BOARD_GOOGLE_CRET
endif #BOARD_GOOGLE_BASEBOARD_DEDEDE
+
+if BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50
+
+config DRIVER_TPM_SPI_BUS
+ default 0x1
+
+config TPM_TIS_ACPI_INTERRUPT
+ int
+ default 4 # GPE0_DW0_4 (GPP_B4)
+
+endif #BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50
+
+if BOARD_GOOGLE_BASEBOARD_DEDEDE_TPM2
+
+config TPM_PIRQ
+ hex
+ default 0x24 # GPP_B4_IRQ
+
+endif #BOARD_GOOGLE_BASEBOARD_DEDEDE_TPM2