diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2018-08-01 13:53:04 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-03 08:07:31 +0000 |
| commit | 59962f3015055ccf746d286330a8ce4cc8edeccd (patch) | |
| tree | b64aa1790fb4df575f9e76985f2f96f7f1420b33 /src/mainboard/google/cyan/variants | |
| parent | 4c1b6b31c0e608d3f4d01947814f4edc9b69bdea (diff) | |
mb/google/auron,cyan: Remove interrupt from devicetree LPC TPM chip driver
These boards require polling vs interrupts, so remove the IRQ definition to
prevent it being added to the SSDT device entry.
Test: Boot Linux on various auron and cyan variants, verify no error for
'TPM interrupt not working' present in kernel boot log.
Change-Id: Ia1139389f075934d41e823ce5190011c90c7cc88
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/27787
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/cyan/variants')
11 files changed, 11 insertions, 55 deletions
diff --git a/src/mainboard/google/cyan/variants/banon/devicetree.cb b/src/mainboard/google/cyan/variants/banon/devicetree.cb index 8d16d04e39..60076c2171 100644 --- a/src/mainboard/google/cyan/variants/banon/devicetree.cb +++ b/src/mainboard/google/cyan/variants/banon/devicetree.cb @@ -135,11 +135,7 @@ chip soc/intel/braswell device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/celes/devicetree.cb b/src/mainboard/google/cyan/variants/celes/devicetree.cb index 84edd74126..2e708af0d6 100644 --- a/src/mainboard/google/cyan/variants/celes/devicetree.cb +++ b/src/mainboard/google/cyan/variants/celes/devicetree.cb @@ -135,11 +135,7 @@ chip soc/intel/braswell device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/cyan/devicetree.cb b/src/mainboard/google/cyan/variants/cyan/devicetree.cb index 0454650c68..dd9b05e5f7 100644 --- a/src/mainboard/google/cyan/variants/cyan/devicetree.cb +++ b/src/mainboard/google/cyan/variants/cyan/devicetree.cb @@ -128,11 +128,7 @@ chip soc/intel/braswell device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/edgar/devicetree.cb b/src/mainboard/google/cyan/variants/edgar/devicetree.cb index 2033f9e4e8..0ba221e3a6 100644 --- a/src/mainboard/google/cyan/variants/edgar/devicetree.cb +++ b/src/mainboard/google/cyan/variants/edgar/devicetree.cb @@ -129,11 +129,7 @@ chip soc/intel/braswell device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/kefka/devicetree.cb b/src/mainboard/google/cyan/variants/kefka/devicetree.cb index e6542cbdb3..1ce056f32e 100644 --- a/src/mainboard/google/cyan/variants/kefka/devicetree.cb +++ b/src/mainboard/google/cyan/variants/kefka/devicetree.cb @@ -142,11 +142,7 @@ chip soc/intel/braswell device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/reks/devicetree.cb b/src/mainboard/google/cyan/variants/reks/devicetree.cb index 53239b5216..302f2da620 100644 --- a/src/mainboard/google/cyan/variants/reks/devicetree.cb +++ b/src/mainboard/google/cyan/variants/reks/devicetree.cb @@ -126,11 +126,7 @@ chip soc/intel/braswell device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/relm/devicetree.cb b/src/mainboard/google/cyan/variants/relm/devicetree.cb index eb48ace92c..65e662c5dd 100644 --- a/src/mainboard/google/cyan/variants/relm/devicetree.cb +++ b/src/mainboard/google/cyan/variants/relm/devicetree.cb @@ -142,11 +142,7 @@ chip soc/intel/braswell device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/setzer/devicetree.cb b/src/mainboard/google/cyan/variants/setzer/devicetree.cb index b8480a3536..f0b2c6f976 100644 --- a/src/mainboard/google/cyan/variants/setzer/devicetree.cb +++ b/src/mainboard/google/cyan/variants/setzer/devicetree.cb @@ -135,11 +135,7 @@ chip soc/intel/braswell device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/terra/devicetree.cb b/src/mainboard/google/cyan/variants/terra/devicetree.cb index 2feb1a399c..d7d0f1f7e8 100644 --- a/src/mainboard/google/cyan/variants/terra/devicetree.cb +++ b/src/mainboard/google/cyan/variants/terra/devicetree.cb @@ -135,11 +135,7 @@ chip soc/intel/braswell device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/ultima/devicetree.cb b/src/mainboard/google/cyan/variants/ultima/devicetree.cb index 287dd02a36..d4ed38b430 100644 --- a/src/mainboard/google/cyan/variants/ultima/devicetree.cb +++ b/src/mainboard/google/cyan/variants/ultima/devicetree.cb @@ -129,11 +129,7 @@ chip soc/intel/braswell device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/wizpig/devicetree.cb b/src/mainboard/google/cyan/variants/wizpig/devicetree.cb index 3fb3053206..7be7a0f792 100644 --- a/src/mainboard/google/cyan/variants/wizpig/devicetree.cb +++ b/src/mainboard/google/cyan/variants/wizpig/devicetree.cb @@ -136,11 +136,7 @@ chip soc/intel/braswell device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end |