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author | Matt DeVillier <matt.devillier@gmail.com> | 2017-09-02 20:49:45 -0500 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-10-15 22:23:05 +0000 |
commit | 94bc265b6437d8793d972efa612579b9c2be0ba3 (patch) | |
tree | 549931de13de926d0943e238ae249acb4f3c8e09 /src/mainboard/google/cyan/variants/ultima/Makefile.inc | |
parent | 81b5bde7e481ab664d581d9c2b17e5b22ac28302 (diff) |
google/ultima: add new board as variant of cyan baseboard
Add support for google/ultima (Lenovo Yoga 11e G3) as
a variant of the cyan Braswell baseboard.
- Add board-specific code as the new ultima variant
Sourced from Chromium branch firmware-ultima-7287.131.B,
commit 3ef9e73: Revert "Revert "soc/intel/braswell: Put SERIRQ in quiet mode""
Change-Id: Ib38b110f50f4d6ae6eda40e787cd3c1c8dd5ece7
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/21576
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Diffstat (limited to 'src/mainboard/google/cyan/variants/ultima/Makefile.inc')
-rw-r--r-- | src/mainboard/google/cyan/variants/ultima/Makefile.inc | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/src/mainboard/google/cyan/variants/ultima/Makefile.inc b/src/mainboard/google/cyan/variants/ultima/Makefile.inc new file mode 100644 index 0000000000..54234095fa --- /dev/null +++ b/src/mainboard/google/cyan/variants/ultima/Makefile.inc @@ -0,0 +1,41 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2013 Google Inc. +## Copyright (C) 2015 Intel Corp. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +romstage-y += spd_util.c + +ramstage-y += gpio.c +ramstage-y += ramstage.c + +SPD_BIN = $(obj)/spd.bin + +SPD_SOURCES = samsung_2GiB_dimm_K4E8E304EE-EGCF +SPD_SOURCES += hynix_2GiB_dimm_H9CCNNN8GTMLAR-NUD +SPD_SOURCES += micron_2GiB_dimm_EDF8132A3MA-JD-F +SPD_SOURCES += samsung_2GiB_dimm_K4E8E324EB-EGCF + +SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex) + +# Include spd ROM data +$(SPD_BIN): $(SPD_DEPS) + for f in $+; \ + do for c in $$(cat $$f | grep -v ^#); \ + do printf $$(printf '\%o' 0x$$c); \ + done; \ + done > $@ + +cbfs-files-y += spd.bin +spd.bin-file := $(SPD_BIN) +spd.bin-type := spd |