diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2021-12-22 10:00:57 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-07 14:08:52 +0000 |
| commit | 84d4ccde795a0f7bd1272a795a51c44c66e77022 (patch) | |
| tree | ec436fa9e7cf6505c08f65ec8bebf7a21bc978b8 /src/mainboard/google/cyan/variants/reks | |
| parent | 2aef22f6fb7fc4cb6839555d92e4e263797fcd58 (diff) | |
mb/google/cyan: Fix variant GPIOs
- set GPSE-77 (Maxim jack detect) to NC for variants using Realtek audio
- set GPSW-37 to NC for all variants (not used for LPE audio)
- set GPSW-95 (Realtek jack detect) to NC for variant using Maxim audio
- set GPSE-77 as maskable on variant using Maxim audio, to match mask setting
for jack detect GPIO on other variants
- set GPSE-81 as maskable on CELES to prevent interrupt storm (likely due to
change in cherryview pinctrl driver circa kernel v3.18 which no longer masks
all interrupts at init)
Change-Id: I50d4b3516eba8906042bb8dea768b229afcf11ea
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61585
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: CoolStar Organization <coolstarorganization@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/cyan/variants/reks')
| -rw-r--r-- | src/mainboard/google/cyan/variants/reks/gpio.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/mainboard/google/cyan/variants/reks/gpio.c b/src/mainboard/google/cyan/variants/reks/gpio.c index ece6c8058d..13cc6398bf 100644 --- a/src/mainboard/google/cyan/variants/reks/gpio.c +++ b/src/mainboard/google/cyan/variants/reks/gpio.c @@ -51,8 +51,7 @@ static const struct soc_gpio_map gpse_gpio_map[] = { GPIO_NC, /* 69 MMC1_RCLK */ Native_M1, /* 75 GPO USB_OC1_B */ Native_M1, /* 76 PMU_RESETBUTTON_B */ - GPI(trig_edge_both, L0, NA, non_maskable, en_edge_detect, NA, NA), - /* GPIO_ALERT 77 */ + GPIO_NC, /* GPIO_ALERT 77 */ Native_M1, /* 78 SDMMC3_PWR_EN_B */ GPIO_NC, /* 79 GPI ILB_SERIRQ */ Native_M1, /* 80 USB_OC0_B */ @@ -90,8 +89,7 @@ static const struct soc_gpio_map gpsw_gpio_map[] = { /* 34 MF_HDA_DOCKRSTB */ GPIO_NC, /* 35 MF_HDA_SYNC */ GPIO_NC, /* 36 GPIO_SW36 MF_HDA_SDI1 */ - GPI(trig_edge_both, L2, P_1K_H, non_maskable, en_edge_detect, NA, NA), - /* 37 MF_HDA_DOCKENB */ + GPIO_NC, /* 37 MF_HDA_DOCKENB */ NATIVE_PU1K_CSEN_INVTX(1), /* 45 I2C5_SDA */ NATIVE_PU1K_CSEN_INVTX(1), /* 46 I2C4_SDA */ NATIVE_PU20K(2), /* 47 I2C6_SDA */ |