diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2017-08-20 17:56:48 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-09-16 22:31:32 +0000 |
| commit | 4f20a4ae47492fc86293f1c6aed063177992fbaf (patch) | |
| tree | 0fdb68c963612f0b4cbc901efbf04293719b9ea2 /src/mainboard/google/cyan/romstage.c | |
| parent | 7427abce07fb80289646b7653242022182b9e8f9 (diff) | |
google/edgar: add new board as variant of cyan baseboard
Add support for google/edgar (Acer Chromebook 14 CB3-431) as
a variant of the cyan Braswell basebaseboard.
- Add board-specific code as the new edgar variant
- Add common code to the baseboard which will apply to all
variants other than cyan
Sourced from Chromium branch firmware-edgar-7287.167.B,
commit 2319742: Edgar: Add Micron MT52L256M32D1PF-107 SPD data
Change-Id: I58548cbbc85828f37c0023e8aa9e09bdca612659
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/21127
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/cyan/romstage.c')
| -rw-r--r-- | src/mainboard/google/cyan/romstage.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/cyan/romstage.c b/src/mainboard/google/cyan/romstage.c index 28a8a46a39..57c40e09bd 100644 --- a/src/mainboard/google/cyan/romstage.c +++ b/src/mainboard/google/cyan/romstage.c @@ -15,6 +15,7 @@ */ #include <soc/romstage.h> +#include <chip.h> /* All FSP specific code goes in this block */ void mainboard_romstage_entry(struct romstage_params *rp) @@ -32,6 +33,9 @@ void mainboard_memory_init_params(struct romstage_params *params, MEMORY_INIT_UPD *memory_params) { /* Update SPD data */ + if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_CYAN)) { + memory_params->PcdMemoryTypeEnable = MEM_LPDDR3; + } memory_params->PcdMemorySpdPtr = (u32)params->pei_data->spd_data_ch0; memory_params->PcdMemChannel0Config = params->pei_data->spd_ch0_config; memory_params->PcdMemChannel1Config = params->pei_data->spd_ch1_config; |