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author | Raul E Rangel <rrangel@chromium.org> | 2021-05-26 17:04:14 -0600 |
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committer | Raul Rangel <rrangel@chromium.org> | 2021-06-08 14:41:59 +0000 |
commit | c54968d977a219c5910108a44c9526c64aba2bc5 (patch) | |
tree | c080f344724816e7b936aa82ad1dd5206d615c9e /src/mainboard/google/cyan/com_init.c | |
parent | 58c58654a68fb4da4c1e5dbe9b954b4fbe26dd42 (diff) |
mb/google/guybrush: Enable RTD3 support for NVMe
This will tell the kernel to ignore PCI ASPM when suspending the device
and instead place the device into D3. We don't actually have a pin to
control power to the NVMe so we leave it in D3Hot. I'm not sure if
`PCI_RST#` is working correctly on S0i3 suspend/resume. If it's not
acting as expected we can add the reset GPIO and have the OS do it.
BUG=b:184617186
TEST=Run suspend_stress_test on guybrush for 10 cycles
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I29539ac120a9f1b7c1bfeaca745cfc82acfa461a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54967
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/cyan/com_init.c')
0 files changed, 0 insertions, 0 deletions