diff options
author | Yidi Lin <yidi.lin@mediatek.com> | 2021-04-12 12:01:48 +0800 |
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committer | Hung-Te Lin <hungte@chromium.org> | 2021-04-14 00:55:47 +0000 |
commit | 97b9d9ef246b29043cb3b6da25ae09cbc4863815 (patch) | |
tree | edefe328b01b204ec99657ba8233277ec5dcbf9a /src/mainboard/google/cherry/chromeos.fmd | |
parent | df9549efb2649e492485a4cc2ff6c3c0b5ccc788 (diff) |
mb/google/cherry: Add MediaTek MT8195 reference board
TEST=boot from SPI-NOR and UART works fine.
Change-Id: I279b3d2da8a30b38686005212f6c019a9a646874
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52259
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/mainboard/google/cherry/chromeos.fmd')
-rw-r--r-- | src/mainboard/google/cherry/chromeos.fmd | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/src/mainboard/google/cherry/chromeos.fmd b/src/mainboard/google/cherry/chromeos.fmd new file mode 100644 index 0000000000..7194632e36 --- /dev/null +++ b/src/mainboard/google/cherry/chromeos.fmd @@ -0,0 +1,45 @@ +# Firmware Layout Description for Chrome OS. +# +# The size and address of every section must be aligned to at least 4K, except: +# RO_FRID, RW_FWID*, GBB, or any unused / padding / CBFS type sections. +# +# 'FMAP' may be found by binary search so its starting address should be better +# aligned to larger values. +# +# For sections to be preserved on update, add (PRESERVE) to individual sections +# instead of a group section; otherwise the preserved data may be wrong if you +# resize or reorder sections inside a group. + +FLASH@0x0 8M { + WP_RO@0x0 4M { + RO_SECTION { + BOOTBLOCK 128K + FMAP 4K + COREBOOT(CBFS) + GBB 0x2f00 + RO_FRID 0x100 + } + RO_VPD(PRESERVE) 32K # At least 16K. + } + RW_SECTION_A 1500K { + VBLOCK_A 8K + FW_MAIN_A(CBFS) + RW_FWID_A 0x100 + } + RW_MISC 36K { + RW_VPD(PRESERVE) 16K # At least 8K. + RW_NVRAM(PRESERVE) 8K + RW_MRC_CACHE(PRESERVE) 8K + RW_ELOG(PRESERVE) 4K # ELOG driver hard-coded size in 4K. + } + RW_SECTION_B 1500K { + VBLOCK_B 8K + FW_MAIN_B(CBFS) + RW_FWID_B 0x100 + } + RW_SHARED 36K { # Will be force updated on recovery. + SHARED_DATA 4K # 4K or less for netboot params. + RW_UNUSED + } + RW_LEGACY(CBFS) 1M # Minimal 1M. +} |