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| author | Rex-BC Chen <rex-bc.chen@mediatek.com> | 2021-05-04 10:34:02 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-05-05 07:37:13 +0000 |
| commit | 46e1b84fad8d8a11c0d84c094f47ef3fa22f711d (patch) | |
| tree | 43582b20e27e4b9b85d1b1c165613d911f027e88 /src/mainboard/google/cherry/Kconfig | |
| parent | 1c920108499a7394bd072a7be380e491eac6fa28 (diff) | |
mb/google/cherry: Add NOR-Flash support
TEST=boot to romstage on MT8195 EVB
Change-Id: I356e6b1cba3c078bf99e056b290476c7179e8ccf
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52872
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/mainboard/google/cherry/Kconfig')
| -rw-r--r-- | src/mainboard/google/cherry/Kconfig | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/cherry/Kconfig b/src/mainboard/google/cherry/Kconfig index 8c7c093245..bf46532a95 100644 --- a/src/mainboard/google/cherry/Kconfig +++ b/src/mainboard/google/cherry/Kconfig @@ -22,4 +22,10 @@ config MAINBOARD_DIR config MAINBOARD_PART_NUMBER string default "Cherry" if BOARD_GOOGLE_CHERRY + +# On MT8195 the SPI flash is actually using a SPI-NOR controller with its own bus. +# The number here should be a virtual value as (SPI_BUS_NUMBER + 1). +config BOOT_DEVICE_SPI_FLASH_BUS + int + default 7 endif |