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authorMatt DeVillier <matt.devillier@gmail.com>2018-07-07 18:45:23 -0500
committerMartin Roth <martinroth@google.com>2018-07-21 00:49:37 +0000
commit39f3c7e1840823c294d7cedf11aed62bdd765141 (patch)
treec2bc823a052f1aa7ae09524e8e5cd5b416981fd6 /src/mainboard/google/chell/spd/spd.c
parent0b9cfe60b20b91fc172e041d192e48f4548572f5 (diff)
google/chell: Convert to a variant of glados
Convert chell to a variant of glados Skylake reference board: - add chell-specific DPTF, EC config, USB port defs, GPIO config, NHLT config, PEI data, VBT, SPD data, and devicetree - add romstage handler to turn on keyboard backlight for boards so equipped - remove existing chell board/directory Test: build/boot google/chell, verify functionality unchanged from pre-variant configuration Change-Id: I7dfbafe3afcab7cee7bcb2bf91c6733c07b409c4 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/27412 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/chell/spd/spd.c')
-rw-r--r--src/mainboard/google/chell/spd/spd.c123
1 files changed, 0 insertions, 123 deletions
diff --git a/src/mainboard/google/chell/spd/spd.c b/src/mainboard/google/chell/spd/spd.c
deleted file mode 100644
index 251b6de3cb..0000000000
--- a/src/mainboard/google/chell/spd/spd.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Google Inc.
- * Copyright (C) 2015 Intel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/byteorder.h>
-#include <cbfs.h>
-#include <console/console.h>
-#include <gpio.h>
-#include <soc/gpio.h>
-#include <soc/pei_data.h>
-#include <soc/romstage.h>
-#include <string.h>
-
-#include "../gpio.h"
-#include "spd.h"
-
-static void mainboard_print_spd_info(uint8_t spd[])
-{
- const int spd_banks[8] = { 8, 16, 32, 64, -1, -1, -1, -1 };
- const int spd_capmb[8] = { 1, 2, 4, 8, 16, 32, 64, 0 };
- const int spd_rows[8] = { 12, 13, 14, 15, 16, -1, -1, -1 };
- const int spd_cols[8] = { 9, 10, 11, 12, -1, -1, -1, -1 };
- const int spd_ranks[8] = { 1, 2, 3, 4, -1, -1, -1, -1 };
- const int spd_devw[8] = { 4, 8, 16, 32, -1, -1, -1, -1 };
- const int spd_busw[8] = { 8, 16, 32, 64, -1, -1, -1, -1 };
- char spd_name[SPD_PART_LEN+1] = { 0 };
-
- int banks = spd_banks[(spd[SPD_DENSITY_BANKS] >> 4) & 7];
- int capmb = spd_capmb[spd[SPD_DENSITY_BANKS] & 7] * 256;
- int rows = spd_rows[(spd[SPD_ADDRESSING] >> 3) & 7];
- int cols = spd_cols[spd[SPD_ADDRESSING] & 7];
- int ranks = spd_ranks[(spd[SPD_ORGANIZATION] >> 3) & 7];
- int devw = spd_devw[spd[SPD_ORGANIZATION] & 7];
- int busw = spd_busw[spd[SPD_BUS_DEV_WIDTH] & 7];
-
- /* Module type */
- printk(BIOS_INFO, "SPD: module type is ");
- switch (spd[SPD_DRAM_TYPE]) {
- case SPD_DRAM_DDR3:
- printk(BIOS_INFO, "DDR3\n");
- break;
- case SPD_DRAM_LPDDR3:
- printk(BIOS_INFO, "LPDDR3\n");
- break;
- default:
- printk(BIOS_INFO, "Unknown (%02x)\n", spd[SPD_DRAM_TYPE]);
- break;
- }
-
- /* Module Part Number */
- memcpy(spd_name, &spd[SPD_PART_OFF], SPD_PART_LEN);
- spd_name[SPD_PART_LEN] = 0;
- printk(BIOS_INFO, "SPD: module part is %s\n", spd_name);
-
- printk(BIOS_INFO,
- "SPD: banks %d, ranks %d, rows %d, columns %d, density %d Mb\n",
- banks, ranks, rows, cols, capmb);
- printk(BIOS_INFO, "SPD: device width %d bits, bus width %d bits\n",
- devw, busw);
-
- if (capmb > 0 && busw > 0 && devw > 0 && ranks > 0) {
- /* SIZE = DENSITY / 8 * BUS_WIDTH / SDRAM_WIDTH * RANKS */
- printk(BIOS_INFO, "SPD: module size is %u MB (per channel)\n",
- capmb / 8 * busw / devw * ranks);
- }
-}
-
-/* Copy SPD data for on-board memory */
-void mainboard_fill_spd_data(struct pei_data *pei_data)
-{
- char *spd_file;
- size_t spd_file_len;
- int spd_index;
-
- gpio_t spd_gpios[] = {
- GPIO_MEM_CONFIG_0,
- GPIO_MEM_CONFIG_1,
- GPIO_MEM_CONFIG_2,
- GPIO_MEM_CONFIG_3,
- };
-
- spd_index = gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios));
- printk(BIOS_INFO, "SPD index %d\n", spd_index);
-
- /* Load SPD data from CBFS */
- spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
- &spd_file_len);
- if (!spd_file)
- die("SPD data not found.");
-
- /* make sure we have at least one SPD in the file. */
- if (spd_file_len < SPD_LEN)
- die("Missing SPD data.");
-
- /* Make sure we did not overrun the buffer */
- if (spd_file_len < ((spd_index + 1) * SPD_LEN)) {
- printk(BIOS_ERR, "SPD index override to 1 - old hardware?\n");
- spd_index = 1;
- }
-
- /* Assume same memory in both channels */
- spd_index *= SPD_LEN;
- memcpy(pei_data->spd_data[0][0], spd_file + spd_index, SPD_LEN);
- memcpy(pei_data->spd_data[1][0], spd_file + spd_index, SPD_LEN);
-
- /* Make sure a valid SPD was found */
- if (pei_data->spd_data[0][0][0] == 0)
- die("Invalid SPD data.");
-
- mainboard_print_spd_info(pei_data->spd_data[0][0]);
-}