diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2019-10-29 17:23:53 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-10-31 01:56:41 +0000 |
| commit | 40964fb4ddd09bb38113c66b00fb833ea41b0f93 (patch) | |
| tree | 5d112f790aeb959e7ce19fed6faf5af6b5e49513 /src/mainboard/google/butterfly/devicetree.cb | |
| parent | 376357c1078ca53573cfb338877d37398ce76978 (diff) | |
soc/intel/icelake: Enable caching on SPI memory-mapped boot device unconditionally
Icelake platform doesn't support booting from any other media
(like eMMC on APL/GLK platform) than only booting from SPI device
and on IA platform SPI is memory mapped hence enabling temporarily
cacheing on memory-mapped spi boot media.
Also removed inclusion of unused header in cpu.c file
TEST=Able to build and boot ICL DE board.
Change-Id: I46d9ec054c4804ca756f2101085a55e91b5cc6f0
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36431
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/butterfly/devicetree.cb')
0 files changed, 0 insertions, 0 deletions