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authorMaulik V Vaghela <maulik.v.vaghela@intel.com>2018-08-30 16:51:43 +0530
committerPatrick Georgi <pgeorgi@google.com>2018-09-10 15:04:32 +0000
commitb2e56c116083131d2ccbcc5b4753ee541e91b4fa (patch)
tree5d7b93befe94bc0766bc6a9eef88de51fdcb8e17 /src/mainboard/google/butterfly/chromeos.fmd
parentcda59b56ba1af83a64579901a5395c1b3c1bf519 (diff)
soc/intel/cannonlake: Correct number of root ports for CNL PCH H
CNL PCH H supports maximum 24 root ports while CNL PCH LP supports maximum 16 root ports. Change-Id: I2cc3ae282d4eb5da8b0618451e062a6c061f1d6f Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/28399 Reviewed-by: Naresh Solanki <naresh.solanki@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/butterfly/chromeos.fmd')
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