diff options
| author | Leo Chou <leo.chou@lcfc.corp-partner.google.com> | 2022-10-04 15:42:39 +0800 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-10-07 21:17:11 +0000 |
| commit | f7e52a7aa4a6a7ea46c586487700fca8e01a1778 (patch) | |
| tree | bd5bda519fb1bf63e9223b6f6dee9ac5a5cb939c /src/mainboard/google/brya | |
| parent | 11bf65caef5f786a00bc0c8913ccf6ef4dcd7932 (diff) | |
mb/google/nissa/pujjo: Change TPM I2C freqeuncy to 1 MHz
Change the TPM I2C freqeuncy to 1 MHz for pujjo.
BUG=b:249953707
TEST=On pujjo, all timing requirements in the spec are met.
Frequencies:
pujjo - 987.80 kHz
Signed-off-by: Leo Chou <leo.chou@lcfc.corp-partner.google.com>
Change-Id: If99b5022a9b67e9c63c440a1e398d56bb2c467e2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68098
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya')
| -rw-r--r-- | src/mainboard/google/brya/variants/pujjo/overridetree.cb | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/brya/variants/pujjo/overridetree.cb b/src/mainboard/google/brya/variants/pujjo/overridetree.cb index a043b4694a..d7d36e1777 100644 --- a/src/mainboard/google/brya/variants/pujjo/overridetree.cb +++ b/src/mainboard/google/brya/variants/pujjo/overridetree.cb @@ -126,11 +126,11 @@ chip soc/intel/alderlake register "common_soc_config" = "{ .i2c[0] = { .early_init = 1, - .speed = I2C_SPEED_FAST, + .speed = I2C_SPEED_FAST_PLUS, .speed_config[0] = { - .speed = I2C_SPEED_FAST, - .scl_lcnt = 160, - .scl_hcnt = 79, + .speed = I2C_SPEED_FAST_PLUS, + .scl_lcnt = 55, + .scl_hcnt = 30, .sda_hold = 7, } }, |