diff options
| author | Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> | 2021-10-27 16:42:10 +0530 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2021-11-15 09:58:50 +0000 |
| commit | f1d0c828d74db259d4be64b498455bd031e7148c (patch) | |
| tree | 2f3da10401c063875e1ed8ae722ecb5a21b50d6a /src/mainboard/google/brya | |
| parent | a2610581a58dd74670013ea3bf5eb6df54bff621 (diff) | |
mb/google/brya/variants/gimble: Update PL1 min value
Update PL1 minimum value from 3W to 12W as per the thermal design
discussed in this bug 203371203 comment #10.
BUG=b:203371203
BRANCH=None
TEST=Build and boot the gimble system
Change-Id: Id66cfb6f6dc0217bd4d83eae1d66ad867a1bdb46
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58650
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya')
| -rw-r--r-- | src/mainboard/google/brya/variants/gimble/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/gimble/overridetree.cb b/src/mainboard/google/brya/variants/gimble/overridetree.cb index 842dd00c06..1a4277fbf7 100644 --- a/src/mainboard/google/brya/variants/gimble/overridetree.cb +++ b/src/mainboard/google/brya/variants/gimble/overridetree.cb @@ -63,7 +63,7 @@ chip soc/intel/alderlake }" register "controls.power_limits" = "{ .pl1 = { - .min_power = 3000, + .min_power = 12000, .max_power = 15000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, |