diff options
| author | Felix Singer <felixsinger@posteo.net> | 2024-04-28 21:56:44 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2024-04-30 08:28:29 +0000 |
| commit | c64bfdf23cbf4aaf41b47c401d0ca1865a95b50e (patch) | |
| tree | bde40b10c2dc00902a8ca74d7a52104b3ef27b90 /src/mainboard/google/brya | |
| parent | 916124cdba1b7135ed6b301a4dcd1db42c714308 (diff) | |
soc/intel/alderlake: Default to 512 for DIMM_SPD_SIZE
Alderlake and Raptorlake SoCs support DDR4 and DDR5, which have a total
SPD size of 512 bytes. Set this as the default and remove the setting
from mainboard Kconfigs.
Change-Id: I8703ec25454a0cd55a3de70f73d2117285a833ae
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82115
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya')
| -rw-r--r-- | src/mainboard/google/brya/Kconfig | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 1565f1373e..79b54f0fa7 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -817,9 +817,6 @@ config VBOOT select VBOOT_EARLY_EC_SYNC if !BOARD_GOOGLE_BASEBOARD_NISSA select VBOOT_LID_SWITCH -config DIMM_SPD_SIZE - default 512 - config UART_FOR_CONSOLE int default 0 |