diff options
author | Won Chung <wonchung@google.com> | 2023-06-01 00:27:50 +0000 |
---|---|---|
committer | Martin L Roth <gaumless@gmail.com> | 2023-06-04 19:17:02 +0000 |
commit | 912edb4f0f21a3535c2b546fc07ad97cf14f25d1 (patch) | |
tree | 90fc0bc1517e9c542b97408309c9fc619dbbb918 /src/mainboard/google/brya | |
parent | 7906d0e1226b75f4efd202c028a52f13d7fd4f25 (diff) |
mb/google/brya/var/taeko: Fix PLD group order
Ensure USB-C ports' _PLD group numbers appear in order.
get_usb_port_references in src/ec/google/chromeec/ec_acpi.c uses group
token to match with the Type-C port number.
BUG=b:216490477
TEST=build coreboot and system boot into OS.
BRANCH=firmware-brya-14505.B
Change-Id: I5c0395d33ee47ab1c7d45f33d6afb063b8263836
Signed-off-by: Won Chung <wonchung@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75572
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya')
-rw-r--r-- | src/mainboard/google/brya/variants/taeko/overridetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb index 54a5ba783e..de188e13a5 100644 --- a/src/mainboard/google/brya/variants/taeko/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb @@ -599,7 +599,7 @@ chip soc/intel/alderlake register "desc" = ""USB3 Type-C Port C1 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))" register "usb_lpm_incapable" = "true" device ref tcss_usb3_port3 on probe DB_USB DB_USB3_NO_A @@ -623,7 +623,7 @@ chip soc/intel/alderlake register "desc" = ""USB2 Type-C Port C1 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))" device ref usb2_port3 on probe DB_USB DB_USB3_NO_A probe DB_USB DB_USB3_1C_1A |