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authorVarshit B Pandya <varshit.b.pandya@intel.com>2021-07-28 16:43:16 +0530
committerPaul Fagerburg <pfagerburg@chromium.org>2021-08-02 15:01:19 +0000
commit7a8c68ad97a3666808313e0b7910690c4f6b4200 (patch)
treefb6222df582f427a9293e7422acc9075520c005e /src/mainboard/google/brya
parenta23d0b663434bd2283831778b3308d16a7cee5ed (diff)
mb/google/brya: Configure H21 as GPO and A17 as low
As per the schematics, UFC has on card oscillator so we donot need H21 in NF1 that is IMGCLKOUT H21 is used to enable this oscialltor so configuring it as 1 A17 is configured as high while _ON method is called by driver and it is configured as low when _OFF method is called by driver. Hence coreboot should configure it as low on boot. BUG=b:190674542 Signed-off-by: Varshit B Pandya <varshit.b.pandya@intel.com> Change-Id: I745169a5ab6a9c20b6e1bda792a43193d04ac48d Reviewed-on: https://review.coreboot.org/c/coreboot/+/56655 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya')
-rw-r--r--src/mainboard/google/brya/variants/baseboard/brya/gpio.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c
index bb74526add..fbe632352d 100644
--- a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c
+++ b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c
@@ -37,7 +37,7 @@ static const struct pad_config gpio_table[] = {
/* A16 : USB_OC3# ==> USB_A0_OC_ODL */
PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
/* A17 : DISP_MISCC ==> EN_FCAM_PWR */
- PAD_CFG_GPO(GPP_A17, 1, DEEP),
+ PAD_CFG_GPO(GPP_A17, 0, DEEP),
/* A18 : DDSP_HPDB ==> HDMI_HPD */
PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
/* A19 : DDSP_HPD1 ==> USB_C2_AUX_DC_P */
@@ -299,7 +299,7 @@ static const struct pad_config gpio_table[] = {
/* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
PAD_CFG_GPO(GPP_H20, 1, DEEP),
/* H21 : IMGCLKOUT2 ==> UCAM_MCLK */
- PAD_CFG_NF(GPP_H21, NONE, DEEP, NF1),
+ PAD_CFG_GPO(GPP_H21, 0, DEEP),
/* H22 : IMGCLKOUT3 ==> WCAM_MCLK_R */
PAD_CFG_NF(GPP_H22, NONE, DEEP, NF1),
/* H23 : SRCCLKREQ5# ==> WWAN_CLKREQ_ODL */