summaryrefslogtreecommitdiff
path: root/src/mainboard/google/brya/variants
diff options
context:
space:
mode:
authorCasper Chang <casper_chang@wistron.corp-partner.google.com>2022-05-03 12:20:43 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-05-06 21:56:37 +0000
commiteb8bbb6c041b360b0a463c56b820ef372d1bac50 (patch)
tree8cee35324d2daf7ec2d62a905daea284daf2fbcd /src/mainboard/google/brya/variants
parent1dfed8fe38ea03aecfd3fa24f0a373877a087ef1 (diff)
mb/google/brask/variants/moli: enable BT offload
Enable BT offload of NAU88L25B on Moli with fw_config NAU88L25B_I2S. BUG=b:220814038 TEST=emerge-brask coreboot, Check BT offload enabled in CPU log and audio works. Signed-off-by: Casper Chang <casper_chang@wistron.corp-partner.google.com> Change-Id: I72d91d2dafffa7d9604b7dd3d697cb3b2b04b152 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64020 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants')
-rw-r--r--src/mainboard/google/brya/variants/moli/Makefile.inc3
-rw-r--r--src/mainboard/google/brya/variants/moli/fw_config.c44
-rw-r--r--src/mainboard/google/brya/variants/moli/overridetree.cb4
-rw-r--r--src/mainboard/google/brya/variants/moli/variant.c13
4 files changed, 64 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/moli/Makefile.inc b/src/mainboard/google/brya/variants/moli/Makefile.inc
index f5c589792d..b799b4d7b8 100644
--- a/src/mainboard/google/brya/variants/moli/Makefile.inc
+++ b/src/mainboard/google/brya/variants/moli/Makefile.inc
@@ -5,3 +5,6 @@ romstage-y += memory.c
ramstage-y += gpio.c
ramstage-y += ramstage.c
+
+ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
+ramstage-$(CONFIG_FW_CONFIG) += variant.c
diff --git a/src/mainboard/google/brya/variants/moli/fw_config.c b/src/mainboard/google/brya/variants/moli/fw_config.c
new file mode 100644
index 0000000000..5302923cd2
--- /dev/null
+++ b/src/mainboard/google/brya/variants/moli/fw_config.c
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <bootstate.h>
+#include <console/console.h>
+#include <fw_config.h>
+#include <gpio.h>
+
+static const struct pad_config bt_i2s_enable_pads[] = {
+ PAD_CFG_NF(GPP_VGPIO_30, NONE, DEEP, NF3), /* BT_I2S_BCLK */
+ PAD_CFG_NF(GPP_VGPIO_31, NONE, DEEP, NF3), /* BT_I2S_SYNC */
+ PAD_CFG_NF(GPP_VGPIO_32, NONE, DEEP, NF3), /* BT_I2S_SDO */
+ PAD_CFG_NF(GPP_VGPIO_33, NONE, DEEP, NF3), /* BT_I2S_SDI */
+ PAD_CFG_NF(GPP_VGPIO_34, NONE, DEEP, NF1), /* SSP2_SCLK */
+ PAD_CFG_NF(GPP_VGPIO_35, NONE, DEEP, NF1), /* SSP2_SFRM */
+ PAD_CFG_NF(GPP_VGPIO_36, NONE, DEEP, NF1), /* SSP_TXD */
+ PAD_CFG_NF(GPP_VGPIO_37, NONE, DEEP, NF1), /* SSP_RXD */
+};
+
+static const struct pad_config bt_i2s_disable_pads[] = {
+ PAD_NC(GPP_VGPIO_30, NONE),
+ PAD_NC(GPP_VGPIO_31, NONE),
+ PAD_NC(GPP_VGPIO_32, NONE),
+ PAD_NC(GPP_VGPIO_33, NONE),
+ PAD_NC(GPP_VGPIO_34, NONE),
+ PAD_NC(GPP_VGPIO_35, NONE),
+ PAD_NC(GPP_VGPIO_36, NONE),
+ PAD_NC(GPP_VGPIO_37, NONE),
+};
+
+static void fw_config_handle(void *unused)
+{
+ if (!fw_config_is_provisioned() || fw_config_probe(FW_CONFIG(AUDIO, AUDIO_UNKNOWN))) {
+ printk(BIOS_INFO, "Disable BT offload audio related GPIO pins.\n");
+ gpio_configure_pads(bt_i2s_disable_pads, ARRAY_SIZE(bt_i2s_disable_pads));
+ return;
+ }
+
+ if (fw_config_probe(FW_CONFIG(AUDIO, NAU88L25B_I2S))) {
+ printk(BIOS_INFO, "BT offload enabled over I2S with NAU88L25B\n");
+ gpio_configure_pads(bt_i2s_enable_pads, ARRAY_SIZE(bt_i2s_enable_pads));
+ }
+
+}
+BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);
diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb
index 07839992b4..e23107936e 100644
--- a/src/mainboard/google/brya/variants/moli/overridetree.cb
+++ b/src/mainboard/google/brya/variants/moli/overridetree.cb
@@ -9,6 +9,10 @@ fw_config
option STORAGE_NVME 1
option STORAGE_EMMC 2
end
+ field AUDIO 6
+ option AUDIO_UNKNOWN 0
+ option NAU88L25B_I2S 1
+ end
end
chip soc/intel/alderlake
# Enable HDMI2 in PortA, HDMI1 in PortB, HDMI/DP in Port2
diff --git a/src/mainboard/google/brya/variants/moli/variant.c b/src/mainboard/google/brya/variants/moli/variant.c
new file mode 100644
index 0000000000..951bfe5365
--- /dev/null
+++ b/src/mainboard/google/brya/variants/moli/variant.c
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <chip.h>
+#include <fw_config.h>
+#include <baseboard/variants.h>
+#include <variant/gpio.h>
+#include <acpi/acpigen.h>
+
+void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
+{
+ config->cnvi_bt_audio_offload = fw_config_probe(FW_CONFIG(AUDIO,
+ NAU88L25B_I2S));
+}