diff options
| author | V Sowmya <v.sowmya@intel.com> | 2022-07-06 13:04:18 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-07-08 07:22:33 +0000 |
| commit | aed31a49a5d2249f4352108dba50061f3959550f (patch) | |
| tree | 474dfa59a9decf351900d49314d1a96c43a1022e /src/mainboard/google/brya/variants | |
| parent | 0f7580e5cc252866f710dee402aa43682b73e7b8 (diff) | |
mb/google/nissa: Confiure the unused virtual Cnvi BT GPIOs to NC
Configure the unused virtual CNVi BT GPIOs to NC since we
are using BT over USB mode for Nissa.
BUG=b:233834597
TEST=Verified BT offload feature on Nivviks P1.
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: Id84823b9ad921ebd7ff773d6cce581563613745f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65669
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants')
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/nissa/gpio.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c b/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c index 6591a6cd02..44c93519e4 100644 --- a/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c @@ -390,6 +390,27 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPD10, NONE), /* GPD11 : NC */ PAD_NC(GPD11, NONE), + + /* Configure the unused virtual CNVi Bluetooth UART pads to NC mode. */ + /* vCNV_BT_UART_TXD */ + PAD_NC(GPP_VGPIO_6, NONE), + /* vCNV_BT_UART_RXD */ + PAD_NC(GPP_VGPIO_7, NONE), + /* vCNV_BT_UART_CTS_B */ + PAD_NC(GPP_VGPIO_8, NONE), + /* vCNV_BT_UART_RTS_B */ + PAD_NC(GPP_VGPIO_9, NONE), + + /* Configure the unused vUART for Bluetooth pads to NC mode. */ + /* vUART0_TXD */ + PAD_NC(GPP_VGPIO_18, NONE), + /* vUART0_RXD */ + PAD_NC(GPP_VGPIO_19, NONE), + /* vUART0_CTS_B */ + PAD_NC(GPP_VGPIO_20, NONE), + /* vUART0_RTS_B */ + PAD_NC(GPP_VGPIO_21, NONE), + }; /* Early pad configuration in bootblock */ |