diff options
| author | Raihow Shi <raihow_shi@wistron.corp-partner.google.com> | 2022-07-19 10:41:20 +0800 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-07-22 03:22:09 +0000 |
| commit | a8a673863186dd5468c7835270322bf202d3d9f2 (patch) | |
| tree | 13c953442475590e11a85388f345f47af44c5731 /src/mainboard/google/brya/variants | |
| parent | 912fea654755f1c2acb5ddc6d34d237dd9a35532 (diff) | |
mb/google/brask/variants/moli: set customized_leds for RTL8111K
Follow the LED modification request in ADL_Moli_SC_MB_2022_0601.pdf and
set the customized_leds to 0x0482 based on 7.4 Customizable LED Configuration in "REALTEK+RTL8111K-CG+SPEC+0116" for RTL8111K in moli.
BUG=b:218985167
TEST=emerge-brask coreboot and check RTL8111K LED behaviour
Signed-off-by: Raihow Shi <raihow_shi@wistron.corp-partner.google.com>
Change-Id: Ia154d15ecf14b32a4d589abf27b9573693339a8a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65958
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya/variants')
| -rw-r--r-- | src/mainboard/google/brya/variants/moli/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb index d7de914ea2..1c66d1ba19 100644 --- a/src/mainboard/google/brya/variants/moli/overridetree.cb +++ b/src/mainboard/google/brya/variants/moli/overridetree.cb @@ -100,7 +100,7 @@ chip soc/intel/alderlake end # IntelI225V Ethernet NIC device ref pcie_rp7 on chip drivers/net - register "customized_leds" = "0x05af" + register "customized_leds" = "0x0482" register "wake" = "GPE0_DW0_07" register "device_index" = "0" device pci 00.0 on end |