summaryrefslogtreecommitdiff
path: root/src/mainboard/google/brya/variants
diff options
context:
space:
mode:
authorV Sowmya <v.sowmya@intel.com>2022-08-10 09:56:10 +0530
committerTim Wawrzynczak <twawrzynczak@chromium.org>2022-08-30 15:15:22 +0000
commit89845064baae8512ba0ab60ddcb090325d0276d8 (patch)
treeecc8bb4c46b4a248b3e33bfc36f5cd1f4f451ce4 /src/mainboard/google/brya/variants
parent2a13527d770b23cbd2c4bfdd7a9a6e126c3babce (diff)
mb/google/nissa: Configure the DPTF policies based on fw_config
This change adds support to configure the DPTF policies based on the fw_config THERMAL_SOLUTION. BUG=b:238713292 TEST=Boot to OS and verify that dptf policies are set based on fw_config. Signed-off-by: V Sowmya <v.sowmya@intel.com> Change-Id: I0ffb9d7cc6c963add001a31ba23a6d6c351dd621 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66589 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org> Reviewed-by: Reka Norman <rekanorman@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants')
-rw-r--r--src/mainboard/google/brya/variants/nivviks/overridetree.cb8
1 files changed, 7 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/nivviks/overridetree.cb b/src/mainboard/google/brya/variants/nivviks/overridetree.cb
index 6e6806acef..df5935d4c0 100644
--- a/src/mainboard/google/brya/variants/nivviks/overridetree.cb
+++ b/src/mainboard/google/brya/variants/nivviks/overridetree.cb
@@ -4,6 +4,10 @@ fw_config
option DB_1C_1A 1
option DB_1C_LTE 2
end
+ field THERMAL_SOLUTION 2
+ option THERMAL_SOLUTION_PASSIVE 0
+ option THERMAL_SOLUTION_ACTIVE 1
+ end
field SD_CARD 4
option SD_GL9750S 0
option SD_ABSENT 1
@@ -161,7 +165,9 @@ chip soc/intel/alderlake
[3] = { 8, 500 }
}"
- device generic 0 on end
+ device generic 0 on
+ probe THERMAL_SOLUTION THERMAL_SOLUTION_PASSIVE
+ end
end
end
device ref ipu on