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authorSeunghwan Kim <sh_.kim@samsung.corp-partner.google.com>2024-05-03 17:01:32 +0900
committerNick Vaccaro <nvaccaro@google.com>2024-05-03 17:40:22 +0000
commit7f7a6e8f7a570b3d865a255763ef290e554d9b78 (patch)
treee3c61ebecf2290b3edbf1562e7788be3fe4ec352 /src/mainboard/google/brya/variants
parent3c7bbde4fdfc90520b5281b266f321219912d942 (diff)
mb/google/brya/var/xol: Update board type to BOARD_TYPE_ULT_ULX
Correct .UserBd field to BOARD_TYPE_ULT_ULX from BOARD_TYPE_MOBILE. This is from Intel's guidance for MRC to map the memory speed to proper POR number. BUG=b:332980211 BRANCH=brya TEST=Built and compare the results of command 'dmidecode -t 17' [Before] (Same values in all of memory device handle) Speed: 6400 MT/s Configured Memory Speed: 6400 MT/s [After] (Same values in all of memory device handle) Speed: 5200 MT/s Configured Memory Speed: 5200 MT/s Change-Id: Id16bcbc2d0cb4c2cf3008cf2ef1027ed98e93afb Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82180 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jamie Chen <jamie.chen@intel.corp-partner.google.com> Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src/mainboard/google/brya/variants')
-rw-r--r--src/mainboard/google/brya/variants/xol/memory.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/xol/memory.c b/src/mainboard/google/brya/variants/xol/memory.c
index f8afa73e14..4e294122d2 100644
--- a/src/mainboard/google/brya/variants/xol/memory.c
+++ b/src/mainboard/google/brya/variants/xol/memory.c
@@ -65,7 +65,7 @@ static const struct mb_cfg variant_memcfg = {
.ect = 1, /* Early Command Training */
- .UserBd = BOARD_TYPE_MOBILE,
+ .UserBd = BOARD_TYPE_ULT_ULX,
};
const struct mb_cfg *variant_memory_params(void)