diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-02-16 20:30:37 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-18 14:56:45 +0000 |
| commit | 5b0ce06d3dd9b727dc2d20b350ba386c00ee680d (patch) | |
| tree | 091fc46d1161dea8a7c4ba30c46938db39f2ce80 /src/mainboard/google/brya/variants | |
| parent | d55a08242b89e12241da70dbd564e2acf2aada57 (diff) | |
mb/google/brya/var/vell: Use ACPI _PLD macro
This patch uses ACPI _PLD macros for USB Type A and C ports.
BUG=b:216490477
TEST=emerge-brya coreboot
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I9e4837489d90c2edd7deaa2af0533085f1ff5ae6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62049
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya/variants')
| -rw-r--r-- | src/mainboard/google/brya/variants/vell/overridetree.cb | 24 |
1 files changed, 16 insertions, 8 deletions
diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb index b00eb2cbb8..15ba44ee87 100644 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -363,25 +363,29 @@ chip soc/intel/alderlake chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(1, 1)" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" device ref tcss_usb3_port1 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C1 (MlB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(2, 1)" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" device ref tcss_usb3_port2 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C2 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(3, 1)" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))" device ref tcss_usb3_port3 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C3 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(4, 1)" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(4, 1))" device ref tcss_usb3_port4 on end end end @@ -393,19 +397,22 @@ chip soc/intel/alderlake chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(1, 1)" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" device ref usb2_port1 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C1 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(2, 1)" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" device ref usb2_port2 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C2 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(3, 1)" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))" device ref usb2_port3 on end end chip drivers/usb/acpi @@ -416,7 +423,8 @@ chip soc/intel/alderlake chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C3 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(4, 1)" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(4, 1))" device ref usb2_port5 on end end chip drivers/usb/acpi |