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authorEric Lai <ericr_lai@compal.corp-partner.google.com>2021-04-23 14:45:02 +0800
committerFelix Held <felix-coreboot@felixheld.de>2021-04-28 09:56:33 +0000
commit21f04d59b5a3f0f58047c889469b12655a6ce36c (patch)
tree83d04c1f3bdb7c1309c84c72a5fe972247232296 /src/mainboard/google/brya/variants
parentdc77bc0546f5d97dc19f2f0107bde0edda27fcd7 (diff)
mb/google/brya: remove WLAN PCIE setting
Brya uses CNVi WiFi module, PCIE setting is not required. TEST=WiFi is functional in the OS. Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: Ib82c98905ed3b30075e9830c1a2638817f140abe Reviewed-on: https://review.coreboot.org/c/coreboot/+/52623 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants')
-rw-r--r--src/mainboard/google/brya/variants/baseboard/devicetree.cb8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/devicetree.cb
index 6a15b9a240..e7a6ed3994 100644
--- a/src/mainboard/google/brya/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/devicetree.cb
@@ -142,14 +142,6 @@ chip soc/intel/alderlake
end
device ref heci1 on end
device ref sata on end
- device ref pcie_rp5 on
- # Enable WLAN PCIE 5 using clk 2
- register "pch_pcie_rp[PCH_RP(5)]" = "{
- .clk_src = 2,
- .clk_req = 2,
- .flags = PCIE_RP_LTR | PCIE_RP_AER,
- }"
- end #PCIE5 WLAN
device ref pcie_rp6 on
# Enable WWAN PCIE 6 using clk 5
register "pch_pcie_rp[PCH_RP(6)]" = "{