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authorAmanda Huang <amanda_hwang@compal.corp-partner.google.com>2022-04-19 17:21:17 +0800
committerTim Wawrzynczak <twawrzynczak@chromium.org>2022-04-20 16:31:16 +0000
commit0c96291ba3434949e16e8b9af9308b3b07d286ea (patch)
treef9e5dc4632a47d1a56113e6b7018fb3ee60b5c79 /src/mainboard/google/brya/variants
parenta6219bebf5eec2433b7a0105405157ed2ac85a3a (diff)
mb/google/brya/var/brya0: Swap TPM and touchscreen I2C bus
Based on the latest schematic, exchange I2C port for TPM/touchscreen. TPM: I2C3 -> I2C1 Touchscreen: I2C1 -> I2C3 BUG=b:202671753 TEST=emerge-brya coreboot Change-Id: Ifa6235869f34e0038a8ecad33d59654626cf7815 Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63709 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/brya/variants')
-rw-r--r--src/mainboard/google/brya/variants/brya0/gpio.c49
-rw-r--r--src/mainboard/google/brya/variants/brya0/overridetree.cb171
2 files changed, 158 insertions, 62 deletions
diff --git a/src/mainboard/google/brya/variants/brya0/gpio.c b/src/mainboard/google/brya/variants/brya0/gpio.c
index 4cf99df49f..251348beaa 100644
--- a/src/mainboard/google/brya/variants/brya0/gpio.c
+++ b/src/mainboard/google/brya/variants/brya0/gpio.c
@@ -117,6 +117,52 @@ static const struct pad_config early_gpio_table_id2[] = {
PAD_NC(GPP_H13, UP_20K),
};
+/* Early pad configuration in bootblock for board id 4 */
+static const struct pad_config early_gpio_table_id4[] = {
+ /* A12 : SATAXPCIE1 ==> EN_PP3300_WWAN */
+ PAD_CFG_GPO(GPP_A12, 1, DEEP),
+ /* A13 : PMC_I2C_SCL ==> GSC_PCH_INT_ODL */
+ PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
+ /* B4 : PROC_GP3 ==> SSD_PERST_L */
+ PAD_CFG_GPO(GPP_B4, 0, DEEP),
+ /* H6 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */
+ PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1),
+ /* H7 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */
+ PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
+ /*
+ * D1 : ISH_GP1 ==> FP_RST_ODL
+ * FP_RST_ODL comes out of reset as hi-z and does not have an external
+ * pull-down. To ensure proper power sequencing for the FPMCU device,
+ * reset signal is driven low early on in bootblock, followed by
+ * enabling of power. Reset signal is deasserted later on in ramstage.
+ * Since reset signal is asserted in bootblock, it results in FPMCU not
+ * working after a S3 resume. This is a known issue.
+ */
+ PAD_CFG_GPO(GPP_D1, 0, DEEP),
+ /* D2 : ISH_GP2 ==> EN_FP_PWR */
+ PAD_CFG_GPO(GPP_D2, 1, DEEP),
+ /* D11 : ISH_SPI_MISO ==> EN_PP3300_SSD */
+ PAD_CFG_GPO(GPP_D11, 1, DEEP),
+ /* E0 : SATAXPCIE0 ==> WWAN_PERST_L (updated in ramstage) */
+ PAD_CFG_GPO(GPP_E0, 0, DEEP),
+ /* E13 : THC0_SPI1_IO2 ==> MEM_CH_SEL */
+ PAD_CFG_GPI(GPP_E13, NONE, DEEP),
+ /* E16 : RSVD_TP ==> WWAN_RST_L (updated in ramstage) */
+ PAD_CFG_GPO(GPP_E16, 0, DEEP),
+ /* E15 : RSVD_TP ==> PCH_WP_OD */
+ PAD_CFG_GPI_GPIO_DRIVER(GPP_E15, NONE, DEEP),
+ /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */
+ PAD_CFG_GPI(GPP_F18, NONE, DEEP),
+ /* F21 : EXT_PWR_GATE2# ==> WWAN_FCPO_L (updated in romstage) */
+ PAD_CFG_GPO(GPP_F21, 0, DEEP),
+ /* H10 : UART0_RXD ==> UART_PCH_RX_DBG_TX */
+ PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
+ /* H11 : UART0_TXD ==> UART_PCH_TX_DBG_RX */
+ PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
+ /* H13 : I2C7_SCL ==> EN_PP3300_SD */
+ PAD_NC(GPP_H13, UP_20K),
+};
+
static const struct pad_config romstage_gpio_table[] = {
/* B4 : PROC_GP3 ==> SSD_PERST_L */
PAD_CFG_GPO(GPP_B4, 1, DEEP),
@@ -142,6 +188,9 @@ const struct pad_config *variant_early_gpio_table(size_t *num)
if (id == BOARD_ID_UNKNOWN || id < 2) {
*num = ARRAY_SIZE(early_gpio_table);
return early_gpio_table;
+ } else if (id >= 4) {
+ *num = ARRAY_SIZE(early_gpio_table_id4);
+ return early_gpio_table_id4;
}
*num = ARRAY_SIZE(early_gpio_table_id2);
diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb
index fd8224c981..6f0eb2168e 100644
--- a/src/mainboard/google/brya/variants/brya0/overridetree.cb
+++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb
@@ -52,6 +52,53 @@ chip soc/intel/alderlake
.configure_ext_fivr = 1,
}"
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| GSPI1 | Fingerprint MCU |
+ #| I2C0 | Audio |
+ #| I2C1 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| I2C2 | SAR |
+ #| I2C3 | TouchScreen |
+ #| I2C5 | Trackpad |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 650,
+ .fall_time_ns = 400,
+ .data_hold_time_ns = 50,
+ },
+ .i2c[1] = {
+ .early_init = 1,
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 600,
+ .fall_time_ns = 400,
+ .data_hold_time_ns = 50,
+ },
+ .i2c[2] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 900,
+ .fall_time_ns = 400,
+ .data_hold_time_ns = 50,
+ },
+ .i2c[3] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 650,
+ .fall_time_ns = 400,
+ .data_hold_time_ns = 50,
+ },
+ .i2c[5] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 650,
+ .fall_time_ns = 400,
+ .data_hold_time_ns = 50,
+ },
+ }"
+
device domain 0 on
device ref dtt on
chip drivers/intel/dptf
@@ -359,62 +406,12 @@ chip soc/intel/alderlake
end
end #I2C0
device ref i2c1 on
- chip drivers/i2c/hid
- register "generic.hid" = ""ELAN9050""
- register "generic.desc" = ""ELAN Touchscreen""
- register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
- register "generic.probed" = "1"
- register "generic.reset_gpio" =
- "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
- register "generic.reset_delay_ms" = "300"
- register "generic.reset_off_delay_ms" = "1"
- register "generic.enable_gpio" =
- "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
- register "generic.enable_delay_ms" = "6"
- register "generic.stop_gpio" =
- "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
- register "generic.stop_off_delay_ms" = "1"
- register "generic.has_power_resource" = "1"
- register "hid_desc_reg_offset" = "0x01"
- device i2c 0x10 on end
- end
- chip drivers/i2c/hid
- register "generic.hid" = ""GDIX0000""
- register "generic.desc" = ""Goodix Touchscreen""
- register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
- register "generic.probed" = "1"
- register "generic.reset_gpio" =
- "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
- register "generic.reset_delay_ms" = "120"
- register "generic.reset_off_delay_ms" = "3"
- register "generic.enable_gpio" =
- "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
- register "generic.enable_delay_ms" = "12"
- register "generic.stop_gpio" =
- "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
- register "generic.stop_off_delay_ms" = "1"
- register "generic.has_power_resource" = "1"
- register "hid_desc_reg_offset" = "0x01"
- device i2c 0x5d on end
- end
- chip drivers/i2c/hid
- register "generic.hid" = ""SIS9815""
- register "generic.desc" = ""SIS Touchscreen""
- register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
- register "generic.probed" = "1"
- register "generic.reset_gpio" =
- "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
- register "generic.stop_gpio" =
- "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
- register "generic.stop_delay_ms" = "100"
- register "generic.enable_gpio" =
- "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
- register "generic.enable_delay_ms" = "7"
- register "generic.has_power_resource" = "1"
- register "hid_desc_reg_offset" = "0x00"
- device i2c 5c on end
+ chip drivers/i2c/tpm
+ register "hid" = ""GOOG0005""
+ register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
+ device i2c 50 on end
end
- end
+ end #I2C1
device ref i2c2 on
chip drivers/i2c/sx9324
register "desc" = ""SAR1 Proximity Sensor""
@@ -584,14 +581,64 @@ chip soc/intel/alderlake
probe HPS HPS_PRESENT
end
end
- end
+ end #I2C2
device ref i2c3 on
- chip drivers/i2c/tpm
- register "hid" = ""GOOG0005""
- register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
- device i2c 50 on end
+ chip drivers/i2c/hid
+ register "generic.hid" = ""ELAN9050""
+ register "generic.desc" = ""ELAN Touchscreen""
+ register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
+ register "generic.probed" = "1"
+ register "generic.reset_gpio" =
+ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
+ register "generic.reset_delay_ms" = "300"
+ register "generic.reset_off_delay_ms" = "1"
+ register "generic.enable_gpio" =
+ "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
+ register "generic.enable_delay_ms" = "6"
+ register "generic.stop_gpio" =
+ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
+ register "generic.stop_off_delay_ms" = "1"
+ register "generic.has_power_resource" = "1"
+ register "hid_desc_reg_offset" = "0x01"
+ device i2c 0x10 on end
end
- end
+ chip drivers/i2c/hid
+ register "generic.hid" = ""GDIX0000""
+ register "generic.desc" = ""Goodix Touchscreen""
+ register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
+ register "generic.probed" = "1"
+ register "generic.reset_gpio" =
+ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
+ register "generic.reset_delay_ms" = "120"
+ register "generic.reset_off_delay_ms" = "3"
+ register "generic.enable_gpio" =
+ "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
+ register "generic.enable_delay_ms" = "12"
+ register "generic.stop_gpio" =
+ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
+ register "generic.stop_off_delay_ms" = "1"
+ register "generic.has_power_resource" = "1"
+ register "hid_desc_reg_offset" = "0x01"
+ device i2c 0x5d on end
+ end
+ chip drivers/i2c/hid
+ register "generic.hid" = ""SIS9815""
+ register "generic.desc" = ""SIS Touchscreen""
+ register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
+ register "generic.probed" = "1"
+ register "generic.reset_gpio" =
+ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
+ register "generic.stop_gpio" =
+ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
+ register "generic.stop_delay_ms" = "100"
+ register "generic.enable_gpio" =
+ "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
+ register "generic.enable_delay_ms" = "7"
+ register "generic.has_power_resource" = "1"
+ register "hid_desc_reg_offset" = "0x00"
+ device i2c 5c on end
+ end
+ end #I2C3
device ref i2c5 on
chip drivers/i2c/generic
register "hid" = ""ELAN0000""
@@ -601,7 +648,7 @@ chip soc/intel/alderlake
register "probed" = "1"
device i2c 15 on end
end
- end
+ end #I2C5
device ref hda on
chip drivers/generic/max98357a
register "hid" = ""MX98357A""