diff options
| author | Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com> | 2024-03-07 15:20:30 +0900 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2024-03-09 23:36:56 +0000 |
| commit | db339b5492ed17d1031eed6701709e7ed176d9a9 (patch) | |
| tree | 1aa11955557b2c96f9f8f492ed1c73f0c893235a /src/mainboard/google/brya/variants/xol/overridetree.cb | |
| parent | aba7a34df264cbf41496bef1e674a2f60f9e96aa (diff) | |
mb/google/brya/var/xol: Update psys_pmax value to 122W
Update psys_pmax value to 122 from 145. This value is from internal
power team.
BUG=None
BRANCH=firmware-brya-14505.B
TEST=FW_NAME=xol emerge-brya coreboot chromeos-bootimage
Change-Id: I8bc58343d5736e2457db006972dc229e16d3fe59
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81104
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/google/brya/variants/xol/overridetree.cb')
| -rw-r--r-- | src/mainboard/google/brya/variants/xol/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/xol/overridetree.cb b/src/mainboard/google/brya/variants/xol/overridetree.cb index 18e8ace5f6..165311d10c 100644 --- a/src/mainboard/google/brya/variants/xol/overridetree.cb +++ b/src/mainboard/google/brya/variants/xol/overridetree.cb @@ -27,7 +27,7 @@ chip soc/intel/alderlake register "tcc_offset" = "6" # TCC of 94 - register "platform_pmax" = "145" + register "platform_pmax" = "122" register "usb2_ports[0]" = "{ .enable = 1, |