diff options
| author | Bora Guvendik <bora.guvendik@intel.com> | 2023-12-13 11:14:01 -0800 |
|---|---|---|
| committer | Nick Vaccaro <nvaccaro@google.com> | 2023-12-15 17:36:41 +0000 |
| commit | d9c347fb8bf5815567ca5fe94f1cf2d0b4cd3c87 (patch) | |
| tree | 1cffb60f905b23216bb921f78f40014ac1a346df /src/mainboard/google/brya/variants/taeko | |
| parent | 0b7388f0504b9ac849857681ee14c5ff4b2cc73c (diff) | |
mb/google/brya: Enable FSP UPD LpDdrDqDqsReTraining
FSP default value for LpDdrDqDqsReTraining is 1. For boards
that didn't set LpDdrDqDqsReTraining to any value, 0 was being
assigned and it caused black screen issue.
BUG=b:302465393
TEST=Boot to OS with debug FSP, check LpDdrDqDqsReTraining = 1
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: I301a6e43f2944ffbc63431393378ab8b23450032
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79527
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/google/brya/variants/taeko')
| -rw-r--r-- | src/mainboard/google/brya/variants/taeko/memory.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/taeko/memory.c b/src/mainboard/google/brya/variants/taeko/memory.c index cecfdc6222..a35708d4b6 100644 --- a/src/mainboard/google/brya/variants/taeko/memory.c +++ b/src/mainboard/google/brya/variants/taeko/memory.c @@ -66,6 +66,8 @@ static const struct mb_cfg baseboard_memcfg = { .ddr7 = { .dqs0 = 0, .dqs1 = 1 }, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Enable Early Command Training */ }; @@ -128,6 +130,8 @@ static const struct mb_cfg hynix_memconfig = { .ddr7 = { .dqs0 = 0, .dqs1 = 1 }, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Enable Early Command Training */ .cs_pi_start_high_in_ect = 1, |