summaryrefslogtreecommitdiff
path: root/src/mainboard/google/brya/variants/rull
diff options
context:
space:
mode:
authorRui Zhou <zhourui@huaqin.corp-partner.google.com>2024-11-06 14:44:49 +0800
committerSubrata Banik <subratabanik@google.com>2024-11-11 08:30:17 +0000
commit5b0dc2b6a015288fa22803a5e2dc99c3dbc21c5c (patch)
tree0ffb1ea32f95f7e0066b69f6a8935f0e0487a9a8 /src/mainboard/google/brya/variants/rull
parente1bfeeab411f017068ee2fcc9b4ffecadfd0d19b (diff)
mb/google/nissa/var/rull: Add ELAN touchscreen to devicetree
Add Elan touchscreen override devicetree for rull based on the latest schematic NB7559_MB_SCH_V1_2024_1010.pdf. BUG=b:374629673 BRANCH=None TEST=1. emerge-nissa coreboot chromeos-bootimage 2. touchpanel function is normal and 'evtest' command displays the touch point Change-Id: Ie7f6dce0175c2940abfa14c4e407414912063112 Signed-off-by: Rui Zhou <zhourui@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85015 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/google/brya/variants/rull')
-rw-r--r--src/mainboard/google/brya/variants/rull/overridetree.cb20
1 files changed, 19 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/rull/overridetree.cb b/src/mainboard/google/brya/variants/rull/overridetree.cb
index b59a0deaf2..d51fe0b659 100644
--- a/src/mainboard/google/brya/variants/rull/overridetree.cb
+++ b/src/mainboard/google/brya/variants/rull/overridetree.cb
@@ -219,7 +219,25 @@ chip soc/intel/alderlake
device generic 0 on end
end
end
- device ref i2c1 off end # Touchscreen
+ device ref i2c1 on
+ chip drivers/i2c/hid
+ register "generic.hid" = ""ELAN9004""
+ register "generic.desc" = ""ELAN Touchscreen""
+ register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
+ register "generic.detect" = "1"
+ register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
+ register "generic.reset_delay_ms" = "20"
+ register "generic.reset_off_delay_ms" = "2"
+ register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
+ register "generic.stop_delay_ms" = "150"
+ register "generic.stop_off_delay_ms" = "2"
+ register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
+ register "generic.enable_delay_ms" = "1"
+ register "generic.has_power_resource" = "1"
+ register "hid_desc_reg_offset" = "0x01"
+ device i2c 10 on end
+ end
+ end
device ref i2c3 on
chip drivers/i2c/rt5645
register "hid" = ""10EC5650""