diff options
author | Wisley Chen <wisley.chen@quanta.corp-partner.google.com> | 2021-08-31 19:07:19 +0600 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-16 00:05:53 +0000 |
commit | d19d27ac3f5b45572092e84dc9ff0bf9d169c20f (patch) | |
tree | f11c44164d287eb6c531e651f4e2f3fb5be1fc7d /src/mainboard/google/brya/variants/redrix | |
parent | cd807213d80612356510f973ea3e6c60dbdcc4f1 (diff) |
mb/google/brya/var/redrix: Add privacy screen
Add privacy screen support.
BUG=b:198188272
TEST=build and check SSDT
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Change-Id: Ied9d9138f68ba45c4d746aed1cd3f828d4ab7fae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57289
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/redrix')
-rw-r--r-- | src/mainboard/google/brya/variants/redrix/overridetree.cb | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb index 450cef8fff..9f28dc2d42 100644 --- a/src/mainboard/google/brya/variants/redrix/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb @@ -16,6 +16,10 @@ fw_config option LTE_USB 1 option LTE_PCIE 2 end + field EPS 10 10 + option PRIVACY_SCREEN_ABSENT 0 + option PRIVACY_SCREEN 1 + end end chip soc/intel/alderlake register "SaGv" = "SaGv_Enabled" @@ -52,6 +56,19 @@ chip soc/intel/alderlake }, }" device domain 0 on + device ref igpu on + chip drivers/gfx/generic + register "device_count" = "1" + register "device[0].name" = ""LCD"" + # Internal panel on the first port of the graphics chip + register "device[0].addr" = "0x80010400" + register "device[0].privacy.enabled" = "1" + register "device[0].privacy.gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H21)" + device generic 0 on + probe EPS PRIVACY_SCREEN + end + end + end # Integrated Graphics Device device ref dtt on chip drivers/intel/dptf ## sensor information |