diff options
| author | Cliff Huang <cliff.huang@intel.com> | 2022-02-23 23:45:14 -0800 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-03-17 15:55:12 +0000 |
| commit | 275478711009ffed866fbc0f30ff2130447913f4 (patch) | |
| tree | 358d72c77cb8f1a816d0620fcede85ce460ff1a2 /src/mainboard/google/brya/variants/redrix | |
| parent | 97f4db72c4c18c067aca35f82ffb162e3a1e9311 (diff) | |
mb/google/brya: Remove Pcie Generic driver for WWAN
This was to merge PCIe ACPI code to WWAN device. But, now use recent
_DSD generation changes in FM driver instead. PCie generic driver is
not used for WWAN at this time.
Also, RTD3 devices are moved to overridetree.cb where WWAN is
present.
BUG=b:221250331
BRANCH=firmware-brya-14505.B
TEST=
Check that _DSD is added to WWAN device in SSDT for the variants.
Check that RTD3 is added to WWAN device in SSDT for the variants.
Signed-off-by: Cliff Huang <cliff.huang@intel.com>
Change-Id: Ia343c7545cf30bdbcd1de19e5eb84049dbb2977f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62330
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/redrix')
| -rw-r--r-- | src/mainboard/google/brya/variants/redrix/overridetree.cb | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb index a44cb40521..149b4f3a91 100644 --- a/src/mainboard/google/brya/variants/redrix/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb @@ -174,7 +174,23 @@ chip soc/intel/alderlake end end device ref pcie_rp6 on - probe DB_LTE LTE_PCIE + # Enable WWAN PCIE 6 using clk 5 + register "pch_pcie_rp[PCH_RP(6)]" = "{ + .clk_src = 5, + .clk_req = 5, + .flags = PCIE_RP_LTR | PCIE_RP_AER, + }" + chip soc/intel/common/block/pcie/rtd3 + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)" + register "reset_off_delay_ms" = "20" + # register "reset_delay_ms" = "1000" + register "srcclk_pin" = "5" + register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL" + register "skip_on_off_support" = "true" + device generic 0 alias rp6_rtd3 on + probe DB_LTE LTE_PCIE + end + end chip drivers/wwan/fm register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F21)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E16)" @@ -182,10 +198,11 @@ chip soc/intel/alderlake register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A7)" register "add_acpi_dma_property" = "true" use rp6_rtd3 as rtd3dev - device generic 0 alias rp6_wwan on + device generic 0 on probe DB_LTE LTE_PCIE end end + probe DB_LTE LTE_PCIE end device ref tcss_dma0 on chip drivers/intel/usb4/retimer |