diff options
| author | Ron Lee <ron.lee@intel.com> | 2022-12-13 19:48:59 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-08 15:47:29 +0000 |
| commit | 558952ae7c8b47e20cfd3daaa98db9c49b353776 (patch) | |
| tree | f341b1df3ef2e5264ad026f792e759b2d05de4ce /src/mainboard/google/brya/variants/osiris | |
| parent | e40cbcf036817b882f745b8a49b8a23646469066 (diff) | |
mb/google/brya: Add usb_lpm_incapable for Type-C port with PS8815
Intel ADL-P USB Type-C ports are not compatible with Parade PS8815
retimer on USB U1/U2 transition. The usb_lpm_incapable config is
used to disable USB U1/U2 transition for these Type-C ports.
This patch add usb_lpm_incapable config for the following variants
with PS8815 retimer:
- kinox MLB: C0
- volmar DB: C1
- osiris MLB: C0/C1
- mithrax DB: C1
- felwinter DB: C1
- taeko DB: C1
- gimble DB: C1
- gimble4es DB: C1
- taniks DB: C1
- marasov DB: C2
- gaelin MLB: C0/C1
- skolas DB: C1
- skolas4es DB: C1
- brya0 DB: C1
BUG=b:253402457
TEST=Plug in device and check LPM sysfs nodes are disabled
localhost ~ # cat /sys/bus/usb/devices/2-X/power/usb3_hardware_lpm_u1
disabled
localhost ~ # cat /sys/bus/usb/devices/2-X/power/usb3_hardware_lpm_u2
disabled
Change-Id: Ie9246ff7908887404f49ec10ee781c8cba410557
Signed-off-by: Ron Lee <ron.lee@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71925
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Diffstat (limited to 'src/mainboard/google/brya/variants/osiris')
| -rw-r--r-- | src/mainboard/google/brya/variants/osiris/overridetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/osiris/overridetree.cb b/src/mainboard/google/brya/variants/osiris/overridetree.cb index 702c8b1376..4221a04729 100644 --- a/src/mainboard/google/brya/variants/osiris/overridetree.cb +++ b/src/mainboard/google/brya/variants/osiris/overridetree.cb @@ -292,6 +292,7 @@ chip soc/intel/alderlake register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" + register "usb_lpm_incapable" = "true" device ref tcss_usb3_port1 on end end chip drivers/usb/acpi @@ -299,6 +300,7 @@ chip soc/intel/alderlake register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" + register "usb_lpm_incapable" = "true" device ref tcss_usb3_port3 on end end end |