diff options
| author | Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> | 2022-03-11 13:45:18 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-18 15:39:47 +0000 |
| commit | b24e45d215db9e0febed1b355b28f685caea2617 (patch) | |
| tree | b5ac2795ce0c1b792a9d22c59d309514f91dde78 /src/mainboard/google/brya/variants/kinox | |
| parent | 2b19d547c0866fef84bdb7b226ce7a4ac81af64f (diff) | |
mb/google/brya/var/kinox: Reconfigure GPIO settings
Configure GPIOs according to updated schematics.
- GPP_A21 from NC to TCP_DP1_CTRLCLK.
- GPP_A22 from NC to TCP_DP1_CTRLDATA.
- GPP_E22 from DDIA_DP_CTRLCLK to NC.
- GPP_E23 from DDIA_DP_CTRLDATA to NC.
BUG=b:214025396
TEST=emerge-brask coreboot
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: I9d2d73820fbb191b682713e4e351c6375927ddf4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62749
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/kinox')
| -rw-r--r-- | src/mainboard/google/brya/variants/kinox/gpio.c | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/src/mainboard/google/brya/variants/kinox/gpio.c b/src/mainboard/google/brya/variants/kinox/gpio.c index fa63c1d8ec..ce556938a3 100644 --- a/src/mainboard/google/brya/variants/kinox/gpio.c +++ b/src/mainboard/google/brya/variants/kinox/gpio.c @@ -16,10 +16,10 @@ static const struct pad_config override_gpio_table[] = { PAD_NC(GPP_A19, NONE), /* A20 : DDSP_HPD2 ==> NC */ PAD_NC(GPP_A20, NONE), - /* A21 : DDPC_CTRCLK ==> NC */ - PAD_NC(GPP_A21, NONE), - /* A22 : DDPC_CTRLDATA ==> NC */ - PAD_NC(GPP_A22, NONE), + /* A21 : DDPC_CTRCLK ==> TCP_DP1_CTRLCLK */ + PAD_CFG_NF(GPP_A21, NONE, DEEP, NF1), + /* A22 : DDPC_CTRLDATA ==> TCP_DP1_CTRLDATA */ + PAD_CFG_NF(GPP_A22, NONE, DEEP, NF1), /* B2 : VRALERT# ==> TP153 */ PAD_NC(GPP_B2, NONE), @@ -56,10 +56,6 @@ static const struct pad_config override_gpio_table[] = { PAD_NC(GPP_E20, NONE), /* E21 : DDP2_CTRLDATA ==> NC */ PAD_NC(GPP_E21, NONE), - /* E22 : DDPA_CTRLCLK ==> DDIA_DP_CTRLCLK */ - PAD_CFG_NF(GPP_E22, NONE, DEEP, NF1), - /* E23 : DDPA_CTRLDATA ==> DDIA_DP_CTRLDATA */ - PAD_CFG_NF(GPP_E23, NONE, DEEP, NF1), /* F11 : THC1_SPI2_CLK ==> NC */ PAD_NC_LOCK(GPP_F11, NONE, LOCK_CONFIG), |