mb/google/brya/var/kinox: Set power limit based on charger type

Set different power limit values using host command to detect charger
type from ec.

Scenario:
1. With 90W customized adapter, set to baseline.
2. With 170W customized adapter, set to performance.
3. With above 90W barrel jack/type-c adapter, set to performance.
4. With below 90W barrel jack/type-c adapter, set to baseline.

BUG=b:231911918
TEST=Build and boot to Chrome OS

Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: I9c8a5a7de8249e61468e277ec55348b660253c5d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64490
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-by: Ian Feng <ian_feng@compal.corp-partner.google.com>
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>

1 files changed, 68 insertions, 7 deletions

diff --git a/src/mainboard/google/brya/variants/kinox/ramstage.c b/src/mainboard/google/brya/variants/kinox/ramstage.c
index fc61e410e9..36f250e7b4 100644
--- a/src/mainboard/google/brya/variants/kinox/ramstage.c
+++ b/src/mainboard/google/brya/variants/kinox/ramstage.c
@@ -2,17 +2,31 @@
 
 #include <baseboard/variants.h>
 #include <chip.h>
+#include <console/console.h>
 #include <device/device.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <ec/google/chromeec/ec.h>
 #include <intelblocks/power_limit.h>
 
-const struct cpu_power_limits limits[] = {
+const struct cpu_power_limits baseline_limits[] = {
 	/* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, pl4 */
-	{ PCI_DID_INTEL_ADL_P_ID_10, 15, 15000, 15000,  39000,  39000, 72500 },
-	{ PCI_DID_INTEL_ADL_P_ID_7, 15, 15000, 15000,  55000,  55000, 123000 },
-	{ PCI_DID_INTEL_ADL_P_ID_6, 15, 15000, 15000,  55000,  55000, 123000 },
+	{ PCI_DID_INTEL_ADL_P_ID_10, 15, 12000, 25000,  39000,  39000, 72500 },
+	{ PCI_DID_INTEL_ADL_P_ID_7, 15, 12000, 25000,  39000,  39000, 72500 },
+	{ PCI_DID_INTEL_ADL_P_ID_6, 15, 12000, 25000,  39000,  39000, 72500 },
+	{ PCI_DID_INTEL_ADL_P_ID_5, 28, 28000, 28000,  64000,  64000,  90000 },
+	{ PCI_DID_INTEL_ADL_P_ID_3, 28, 28000, 28000,  64000,  64000, 140000 },
+	{ PCI_DID_INTEL_ADL_P_ID_5, 45, 45000, 45000,  95000,  95000, 125000 },
+	{ PCI_DID_INTEL_ADL_P_ID_4, 45, 45000, 45000, 115000, 115000, 215000 },
+	{ PCI_DID_INTEL_ADL_P_ID_3, 45, 45000, 45000, 115000, 115000, 215000 },
+	{ PCI_DID_INTEL_ADL_P_ID_1, 45, 45000, 45000,  95000,  95000, 125000 },
+};
+
+const struct cpu_power_limits perf_limits[] = {
+	/* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, pl4 */
+	{ PCI_DID_INTEL_ADL_P_ID_10, 15, 15000, 30000,  55000,  55000, 123000 },
+	{ PCI_DID_INTEL_ADL_P_ID_7, 15, 15000, 30000,  55000,  55000, 123000 },
+	{ PCI_DID_INTEL_ADL_P_ID_6, 15, 15000, 30000,  55000,  55000, 123000 },
 	{ PCI_DID_INTEL_ADL_P_ID_5, 28, 28000, 28000,  64000,  64000,  90000 },
 	{ PCI_DID_INTEL_ADL_P_ID_3, 28, 28000, 28000,  64000,  64000, 140000 },
 	{ PCI_DID_INTEL_ADL_P_ID_5, 45, 45000, 45000,  95000,  95000, 125000 },
@@ -34,6 +48,11 @@ const struct system_power_limits sys_limits[] = {
 	{ PCI_DID_INTEL_ADL_P_ID_1, 45, 230 },
 };
 
+enum charger_watt {
+	CHARGER_90W = 90,
+	CHARGER_170W = 170,
+};
+
 /*
  * Psys_pmax considerations.
  *
@@ -60,9 +79,51 @@ const struct psys_config psys_config = {
 	.bj_volts_mv = 20000
 };
 
+static void change_power_limits(const struct cpu_power_limits *limits, size_t num_entries)
+{
+	variant_update_psys_power_limits(limits, sys_limits, num_entries, &psys_config);
+	variant_update_power_limits(limits, num_entries);
+}
+
+static void update_power_limits(void)
+{
+	enum usb_chg_type type;
+	uint16_t volts_mv, current_ma, watts;
+	size_t total_entries;
+	int rv = google_chromeec_get_usb_pd_power_info(&type, &current_ma, &volts_mv);
+	if (rv == 0) {
+		watts = ((uint32_t)current_ma * volts_mv) / 1000000;
+		printk(BIOS_INFO, "PL124: type: (%u) Current_ma: (%u) Volts_mv: (%u) Watts: (%u)\n",
+			type, current_ma, volts_mv, watts);
+		if (type == USB_CHG_TYPE_PROPRIETARY) {
+			if (watts == CHARGER_170W) {
+				printk(BIOS_INFO, "PL124: Performance.\n");
+				total_entries = ARRAY_SIZE(perf_limits);
+				change_power_limits(perf_limits, total_entries);
+			} else {
+				printk(BIOS_INFO, "PL124: Baseline.\n");
+				total_entries = ARRAY_SIZE(baseline_limits);
+				change_power_limits(baseline_limits, total_entries);
+			}
+		} else {
+			if (watts >= CHARGER_90W) {
+				printk(BIOS_INFO, "PL124: Performance.\n");
+				total_entries = ARRAY_SIZE(perf_limits);
+				change_power_limits(perf_limits, total_entries);
+			} else {
+				printk(BIOS_INFO, "PL124: Baseline.\n");
+				total_entries = ARRAY_SIZE(baseline_limits);
+				change_power_limits(baseline_limits, total_entries);
+			}
+		}
+	} else {
+		printk(BIOS_INFO, "EC cmd failure: PL124: Baseline.\n");
+		total_entries = ARRAY_SIZE(baseline_limits);
+		change_power_limits(baseline_limits, total_entries);
+	}
+}
+
 void variant_devtree_update(void)
 {
-	size_t total_entries = ARRAY_SIZE(limits);
-	variant_update_psys_power_limits(limits, sys_limits, total_entries, &psys_config);
-	variant_update_power_limits(limits, total_entries);
+	update_power_limits();
 }