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authorMark Hsieh <mark_hsieh@wistron.corp-partner.google.com>2023-10-05 21:36:38 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-10-09 13:42:24 +0000
commit90f8151271b071c08f5d9b4d2a89e1018a3b88fd (patch)
tree3f8be6353195e5f0b6d9c2c25d9ebf1efda0703e /src/mainboard/google/brya/variants/joxer
parent70b517ee5791fb4c5136231304f8cf1d734c66a9 (diff)
mb/google/nissa/var/joxer: Configure Acoustic noise mitigation
- Enable Acoustic noise mitigation - Set slow slew rate VCCIA and VCCGT to SLEW_FAST_8 - Set FastPkgCRampDisable VCCIA and VCCGT to 1 BUG=b:303533832 TEST=USE="project_joxer emerge-nissa coreboot" Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com> Change-Id: I575da55b96bf4deacec5c0992eae9930eb0745d6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78256 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Derek Huang <derekhuang@google.com>
Diffstat (limited to 'src/mainboard/google/brya/variants/joxer')
-rw-r--r--src/mainboard/google/brya/variants/joxer/overridetree.cb7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/joxer/overridetree.cb b/src/mainboard/google/brya/variants/joxer/overridetree.cb
index 12175c5eae..135041d0a7 100644
--- a/src/mainboard/google/brya/variants/joxer/overridetree.cb
+++ b/src/mainboard/google/brya/variants/joxer/overridetree.cb
@@ -16,6 +16,13 @@ end
chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled"
+ # Acoustic settings
+ register "acoustic_noise_mitigation" = "1"
+ register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
+ register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
+ register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
+ register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
+
# EMMC Tx CMD Delay
# Refer to EDS-Vol2-42.3.7.
# [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39.