diff options
| author | Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com> | 2023-07-24 03:06:50 +0000 |
|---|---|---|
| committer | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2023-07-28 14:22:55 +0000 |
| commit | aae52ef4b35a9dd2b27c2fe28083dee4e87e8d05 (patch) | |
| tree | 25834c96a1ca59240fdfb12de3ad840b15817037 /src/mainboard/google/brya/variants/gothrax/overridetree.cb | |
| parent | f4e3f15b44f0d0e117781d194f700cc19b3a88c7 (diff) | |
mb/google/nissa/var/gothrax: Tune SX9324 P-sensor configuration
Update SX9324 register settings based on tuning value from SEMTECH.
－ Enable GPP_B5/GPP_B6
－ Enable GPP_H19 open irq
－ Adjust register reg_afe_ctrl0/reg_afe_ctrl3/reg_afe_ctrl4
BUG=b:292016304
BRANCH=None
TEST=Check register settings and confirm P-sensor function can work.
Signed-off-by: Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com>
Change-Id: I6f15f7a7c428aee45d35830574ef84aefcae6401
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76711
Reviewed-by: Kyle Lin <kylelinck@google.com>
Reviewed-by: Derek Huang <derekhuang@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/gothrax/overridetree.cb')
| -rw-r--r-- | src/mainboard/google/brya/variants/gothrax/overridetree.cb | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/brya/variants/gothrax/overridetree.cb b/src/mainboard/google/brya/variants/gothrax/overridetree.cb index 0cc0954ae9..2cb87a4e4b 100644 --- a/src/mainboard/google/brya/variants/gothrax/overridetree.cb +++ b/src/mainboard/google/brya/variants/gothrax/overridetree.cb @@ -227,14 +227,14 @@ chip soc/intel/alderlake register "desc" = ""SAR2 Proximity Sensor"" register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H19_IRQ)" register "speed" = "I2C_SPEED_FAST" - register "uid" = "2" + register "uid" = "1" register "reg_gnrl_ctrl0" = "0x16" register "reg_gnrl_ctrl1" = "0x21" - register "reg_afe_ctrl0" = "0x00" + register "reg_afe_ctrl0" = "0x20" register "reg_afe_ctrl1" = "0x10" register "reg_afe_ctrl2" = "0x00" - register "reg_afe_ctrl3" = "0x00" - register "reg_afe_ctrl4" = "0x07" + register "reg_afe_ctrl3" = "0x01" + register "reg_afe_ctrl4" = "0x46" register "reg_afe_ctrl5" = "0x00" register "reg_afe_ctrl6" = "0x00" register "reg_afe_ctrl7" = "0x07" |