diff options
| author | Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com> | 2021-12-07 17:22:42 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-12-23 15:08:01 +0000 |
| commit | 8402c421b1e607164297d3d3e93225a205893610 (patch) | |
| tree | 10df6c0334565dad29ae43b83f2ff61a6e0cecf4 /src/mainboard/google/brya/variants/gimble4es | |
| parent | b647e35119c10099b78609f432a7cb9ad3e7e1e2 (diff) | |
mb/google/brya/var/gimble4es: Configure Acoustic noise mitigation
- Enable Acoustic noise mitigation
- Copied from gimble set slow slew rate VCCIA and VCCGT to 8
BUG=b:206704930
TEST=USE="project_gimble emerge-brya coreboot" and verify it builds
without error.
Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Change-Id: I156859ce6894a6ed5270fe0242de4aef9656bbeb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59949
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: YH Lin <yueherngl@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/gimble4es')
| -rw-r--r-- | src/mainboard/google/brya/variants/gimble4es/overridetree.cb | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/gimble4es/overridetree.cb b/src/mainboard/google/brya/variants/gimble4es/overridetree.cb index 5f8bd0eabc..5b022f642c 100644 --- a/src/mainboard/google/brya/variants/gimble4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/gimble4es/overridetree.cb @@ -34,6 +34,13 @@ chip soc/intel/alderlake register "SaGv" = "SaGv_Enabled" register "PsysPmax" = "143" register "TcssAuxOri" = "1" + # Acoustic settings + register "AcousticNoiseMitigation" = "1" + register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8" + register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8" + register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1" + register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1" + register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}" register "usb2_ports[1]" = "USB2_PORT_MAX(OC1)" # set MAX to USB2_C1 for eye diagram register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Disable USB2_C2 |