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| author | David Wu <david_wu@quanta.corp-partner.google.com> | 2021-10-25 22:52:52 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-27 14:07:01 +0000 |
| commit | ba6fdc892d62741e456ac5628fcd6f869c4cb9af (patch) | |
| tree | 31d0078ac1ebfec9b7854cb6e77bdf147dd305aa /src/mainboard/google/brya/variants/felwinter | |
| parent | 008c2b18b1dc631d19099a7d84c39dbf4a65dad9 (diff) | |
mb/google/brask: Correct GPIO GPP_R6 and GPP_R7 setting
Correct GPIO GPP_R6 and GPP_R7 setting to NF2 (DMIC_CLK1 and DMIC_DATA1).
BUG=b:197385770
TEST=emerge-brask coreboot and verify it builds without error.
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: Ia3813306f8c7b69fe5cf0e188c55256b68d329ab
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58578
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/felwinter')
0 files changed, 0 insertions, 0 deletions