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authorSumeet Pawnikar <sumeet.r.pawnikar@intel.com>2021-08-26 19:12:58 +0530
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-09-03 17:06:20 +0000
commit684a4f21bb5ce890e441ecac8b6f02d4f0e50b9d (patch)
tree9adac084fea3b27e2f3c4f72e687d8bb992b262e /src/mainboard/google/brya/variants/brya0
parent423945876dd632598ee842894cac50203c93d4ea (diff)
mb/google/brya/variants: fix override values for power limits
There are two different types of 682 SKU available with TDP of 28W and 45W. This patch fix override values for power limits for these 682 SKU. This patch also sets power limit values dynamically based on machine ID and CPU TDP of SKU. BUG=b:194745919 BRANCH=None TEST=Build FW and test on brya0 board Change-Id: I796e56321ae9c8312530a4b8986cd73a2245f5fa Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57290 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/brya0')
-rw-r--r--src/mainboard/google/brya/variants/brya0/ramstage.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/src/mainboard/google/brya/variants/brya0/ramstage.c b/src/mainboard/google/brya/variants/brya0/ramstage.c
index d1f399faf1..cfb966298e 100644
--- a/src/mainboard/google/brya/variants/brya0/ramstage.c
+++ b/src/mainboard/google/brya/variants/brya0/ramstage.c
@@ -4,11 +4,12 @@
#include <device/pci_ids.h>
const struct cpu_power_limits limits[] = {
- /* SKU_ID, pl1_min, pl1_max, pl2_min, pl2_max, pl4 */
+ /* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, pl4 */
/* All values are for baseline config as per bug:191906315 comment #10 */
- { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 3000, 15000, 39000, 39000, 100000 },
- { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 4000, 28000, 43000, 43000, 105000 },
- { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 5000, 45000, 80000, 80000, 159000 },
+ { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, 3000, 15000, 39000, 39000, 100000 },
+ { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, 4000, 28000, 43000, 43000, 105000 },
+ { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, 4000, 28000, 43000, 43000, 105000 },
+ { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 45, 5000, 45000, 80000, 80000, 159000 },
};
void variant_devtree_update(void)