diff options
| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2022-11-14 10:28:27 -0800 |
|---|---|---|
| committer | Nick Vaccaro <nvaccaro@google.com> | 2022-11-30 16:02:01 +0000 |
| commit | 54a6b1f281e95300fc37be515da04f00925c30d6 (patch) | |
| tree | 5d5570ffcae8bd8e7672b6534270f28d6f375587 /src/mainboard/google/brya/variants/brya0 | |
| parent | fade723b2551d12c98c91c968d213eeb827d856d (diff) | |
mb/google/brya: Enable Fast VMode for brya0, skolas and skolas4es
Fast VMode nmakes the SoC throttle when the current exceeds the I_TRIP
threshold.
FSP silicon discards the request if the Voltage Regulator or SoC does
not support the feature.
BUG:b:259057787
TEST:Verify that the feature is enabled by reading from pcode
No PnP regression observed
BRANCH=firmware-brya-14505.B
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Change-Id: I7e318534f1429af8ec06048430966344ddd346a1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69579
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Cliff Huang <cliff.huang@intel.com>
Reviewed-by: Jeremy Compostella <jeremy.compostella@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/brya0')
| -rw-r--r-- | src/mainboard/google/brya/variants/brya0/overridetree.cb | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index 8decc062e1..1291f2025d 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -44,6 +44,10 @@ fw_config end chip soc/intel/alderlake + register "domain_vr_config[VR_DOMAIN_IA]" = "{ + .enable_fast_vmode = 1, + }" + register "sagv" = "SaGv_Enabled" register "platform_pmax" = "145" |