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author | Subrata Banik <subratabanik@google.com> | 2021-12-29 18:24:07 +0000 |
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committer | Nico Huber <nico.h@gmx.de> | 2022-01-03 15:07:26 +0000 |
commit | 69107c149b458be1ba7500d59686cdea066a0cae (patch) | |
tree | c12b32bfec4a1d74b56411951b965d330f137b0f /src/mainboard/google/brya/variants/brask | |
parent | b4a169a1e19969ef584e19a57df2a5cd0ae3b573 (diff) |
drivers/intel/fsp: Map FSP debug level to coreboot console level
This patch maps coreboot console level to FSP debug level. This
is useful to suppress MRC (FSP-M) debug logs.
Callers have to select HAVE_DEBUG_RAM_SETUP config to get verbose MRC
debug log,
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I398d576fad68a0d0fc931c175bbc04fcbc2e54ec
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60471
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/brask')
0 files changed, 0 insertions, 0 deletions