mb/google/brya: Move ACPI MPTS method from DSDT to SSDT for Brya and Redrix

This change is to move MPTS (Mainboard Prepare To Sleep) method from
wwan_power.asl to SSDT.

MPTS is mainboard-specific method, while wwan_power.asl is meant for
WWAN from its name.

Having fixed MPTS method (i.e. DSDT) can not cover the case where device
only presents and certain CBI bit(s) is(are) set.

In Redrix and Brya, there are SKUs with or without 5G, 4G device. For
those with 4G, MPTS method should be different. For those with no WWAN
device, no MPTS is needed.

Having MPTS generating in SSDT also eliminates the need for introducing
Kconfig flags to support different devices in the future.
MPTS method is created inside mainboard_fill_ssdt function in which the
corresponding variant function is called.

This will generate the following for the mainboard:
Scope (\_SB)
{
    Method (MPTS, 1, Serialized)
    {
        Local0 = \_SB.PCI0.RP01.RTD3._STA ()
        If ((Local0 == One))
        {
            \_SB.PCI0.RP01.PXSX.DPTS (Arg0)
        }
    }
}

Test:
Check the SSDT for MPTS method under \_SB after boot to OS
Use shutdown command and check the GPIO pins from logical analyzer

Signed-off-by: Cliff Huang <cliff.huang@intel.com>
Change-Id: I0f0b7638e90a7862173fca99305398bb250373e9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61887
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

1 files changed, 1 insertions, 0 deletions

diff --git a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h
index b3a10e0a64..7c1ce21f6c 100644
--- a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h
@@ -23,6 +23,7 @@ void variant_get_spd_info(struct mem_spd *spd_info);
 int variant_memory_sku(void);
 bool variant_is_half_populated(void);
 void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config);
+void variant_fill_ssdt(const struct device *dev);
 
 /* Modify devictree settings during ramstage */
 void variant_devtree_update(void);