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authorSubrata Banik <subratabanik@google.com>2022-01-31 14:31:33 +0530
committerSubrata Banik <subratabanik@google.com>2022-02-02 06:58:11 +0000
commitda2827779c81ec1b0038996027d9d506d11a35f0 (patch)
tree94d5dab77a4be9e0b1046cf55a7a4477ac624249 /src/mainboard/google/brya/variants/baseboard/brask
parent7e91db714853fcc55b1bc63707f1618908bbf8dd (diff)
mb/google/brya: Lock TPM pin in brask and brya baseboards
This applies a configuration lock to the TPM I2C and IRQ GPIO for all brya and brask variants. BUG=b:208827718 TEST=cat /sys/kernel/debug/pinctrl/INTC1055\:00/pins suggests I2C_TPM_SDL and I2C_TPM__SDA GPIO PINs are locked. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I4f2a7014faeecd4701ea35ec77ef0e1692516b9d Reviewed-on: https://review.coreboot.org/c/coreboot/+/61499 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/baseboard/brask')
-rw-r--r--src/mainboard/google/brya/variants/baseboard/brask/gpio.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c
index 268cddc999..40d73ebb79 100644
--- a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c
+++ b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c
@@ -269,9 +269,9 @@ static const struct pad_config gpio_table[] = {
/* H5 : I2C0_SCL ==> PCH_I2C_AUD_SCL */
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
/* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */
- PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1),
+ PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG),
/* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL */
- PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
+ PAD_CFG_NF_LOCK(GPP_H7, NONE, NF1, LOCK_CONFIG),
/* H8 : I2C4_SDA ==> WWAN_WLAN_COEX1 */
PAD_CFG_NF(GPP_H8, NONE, DEEP, NF2),
/* H9 : I2C4_SCL ==> WWAN_WLAN_COEX2 */