diff options
author | Frank Wu <frank_wu@compal.corp-partner.google.com> | 2022-03-15 15:14:44 +0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-27 15:33:24 +0000 |
commit | 599a12b450d00780ce16a1c905c38922eea7f977 (patch) | |
tree | ac91f3b34b061f906a6b9a4ddcdaef23655e9171 /src/mainboard/google/brya/variants/banshee/gpio.c | |
parent | b0769db48ff394b1e71a139bc7ccd5b92ca13789 (diff) |
mb/google/brya/var/banshee: Add mic mute switch setting
Using the GPP_F22 as mic mute switch based on the latest schematic.
BUG=b:223737606, b:216110896
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot chromeos-bootimage
The mic_mute event is changed when the mic_mute GPIO pin is switched.
Event: time 1647939954.639995, type 5 (EV_SW), code 14 (SW_MUTE_DEVICE), value 0
Event: time 1647939954.639995, -------------- SYN_REPORT ------------
Event: time 1647939954.648152, type 5 (EV_SW), code 14 (SW_MUTE_DEVICE), value 1
Event: time 1647939954.648152, -------------- SYN_REPORT ------------
Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: I6f7176afbd64f7c080f02369f195043a2df88e5d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62804
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/brya/variants/banshee/gpio.c')
-rw-r--r-- | src/mainboard/google/brya/variants/banshee/gpio.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/banshee/gpio.c b/src/mainboard/google/brya/variants/banshee/gpio.c index a6f6854728..b8f4dab823 100644 --- a/src/mainboard/google/brya/variants/banshee/gpio.c +++ b/src/mainboard/google/brya/variants/banshee/gpio.c @@ -186,7 +186,8 @@ static const struct pad_config override_gpio_table[] = { PAD_NC(GPP_F20, NONE), /* F21 : EXT_PWR_GATE2# ==> NC */ PAD_NC(GPP_F21, NONE), - /* F22 : NC */ + /* F22 : NC ==> MIC_SW */ + PAD_CFG_GPI_GPIO_DRIVER(GPP_F22, NONE, DEEP), /* F23 : NC */ /* H0 : GPPH0_BOOT_STRAP1 */ |